/external/v8/src/interpreter/ |
D | bytecode-register-optimizer.cc | 16 class BytecodeRegisterOptimizer::RegisterInfo final : public ZoneObject { class in v8::internal::interpreter::BytecodeRegisterOptimizer 18 RegisterInfo(Register reg, uint32_t equivalence_id, bool materialized, in RegisterInfo() function in v8::internal::interpreter::BytecodeRegisterOptimizer::RegisterInfo 28 void AddToEquivalenceSetOf(RegisterInfo* info); 32 bool IsInSameEquivalenceSet(RegisterInfo* info) const; 37 RegisterInfo* GetAllocatedEquivalent(); 43 RegisterInfo* GetMaterializedEquivalent(); 49 RegisterInfo* GetMaterializedEquivalentOtherThan(Register reg); 57 RegisterInfo* GetEquivalentToMaterialize(); 63 RegisterInfo* GetEquivalent(); 86 RegisterInfo* next_; [all …]
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D | bytecode-register-optimizer.h | 48 RegisterInfo* input_info = GetRegisterInfo(input); in NON_EXPORTED_BASE() 52 RegisterInfo* output_info = GetRegisterInfo(output); in NON_EXPORTED_BASE() 56 RegisterInfo* input_info = GetRegisterInfo(input); in NON_EXPORTED_BASE() 57 RegisterInfo* output_info = GetRegisterInfo(output); in NON_EXPORTED_BASE() 114 class RegisterInfo; in NON_EXPORTED_BASE() local 122 void RegisterTransfer(RegisterInfo* input, RegisterInfo* output); in NON_EXPORTED_BASE() 125 void OutputRegisterTransfer(RegisterInfo* input, RegisterInfo* output); in NON_EXPORTED_BASE() 127 void CreateMaterializedEquivalent(RegisterInfo* info); in NON_EXPORTED_BASE() 128 RegisterInfo* GetMaterializedEquivalent(RegisterInfo* info); in NON_EXPORTED_BASE() 129 RegisterInfo* GetMaterializedEquivalentNotAccumulator(RegisterInfo* info); in NON_EXPORTED_BASE() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-cfi-verify/lib/ |
D | FileAnalysis.cpp | 179 if (InstrDesc.mayAffectControlFlow(InstrMeta.Instruction, *RegisterInfo)) in canFallThrough() 195 if (InstrDesc.mayAffectControlFlow(InstrMeta.Instruction, *RegisterInfo)) { in getDefiniteNextInstruction() 249 return RegisterInfo.get(); in getRegisterInfo() 270 if (!InstrDesc.mayAffectControlFlow(InstrMetaPtr->Instruction, *RegisterInfo)) in validateCFIProtection() 327 *RegisterInfo)) { in indirectCFOperandClobber() 369 RegisterInfo.reset(ObjectTarget->createMCRegInfo(TripleName)); in initialiseDisassemblyMembers() 370 if (!RegisterInfo) in initialiseDisassemblyMembers() 374 AsmInfo.reset(ObjectTarget->createMCAsmInfo(*RegisterInfo, TripleName)); in initialiseDisassemblyMembers() 388 Context.reset(new MCContext(AsmInfo.get(), RegisterInfo.get(), &MOFI)); in initialiseDisassemblyMembers() 401 *RegisterInfo)); in initialiseDisassemblyMembers() [all …]
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D | FileAnalysis.h | 197 std::unique_ptr<const MCRegisterInfo> RegisterInfo; variable
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/external/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.h | 26 const LanaiRegisterInfo RegisterInfo; variable 35 return RegisterInfo; in getRegisterInfo() 59 const TargetRegisterInfo *RegisterInfo) const override; 66 const TargetRegisterInfo *RegisterInfo) const override;
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D | LanaiInstrInfo.cpp | 33 RegisterInfo() {} in LanaiInstrInfo() 54 const TargetRegisterInfo *RegisterInfo) const { in storeRegToStackSlot() 74 const TargetRegisterInfo *RegisterInfo) const { in loadRegFromStackSlot()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiInstrInfo.h | 27 const LanaiRegisterInfo RegisterInfo; variable 36 return RegisterInfo; in getRegisterInfo() 60 const TargetRegisterInfo *RegisterInfo) const override; 67 const TargetRegisterInfo *RegisterInfo) const override;
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D | LanaiInstrInfo.cpp | 33 RegisterInfo() {} in LanaiInstrInfo()
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/external/llvm/docs/TableGen/ |
D | BackEnds.rst | 83 RegisterInfo section in LLVM BackEnds
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/external/llvm/docs/ |
D | MIRLangRef.rst | 454 defined in the target's ``*RegisterInfo.td`` file.
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D | WritingAnLLVMBackend.rst | 87 target-specific ``RegisterInfo.td`` input file. You should also write
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D | CodeGenerator.rst | 1222 can check which registers are aliased by inspecting its ``RegisterInfo.td``
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/TableGen/ |
D | BackEnds.rst | 83 RegisterInfo section in LLVM BackEnds
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | MIRLangRef.rst | 574 defined in the target's ``*RegisterInfo.td`` file.
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D | WritingAnLLVMBackend.rst | 87 target-specific ``RegisterInfo.td`` input file. You should also write
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D | CodeGenerator.rst | 1222 can check which registers are aliased by inspecting its ``RegisterInfo.td``
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