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Searched refs:ReplaceReg (Results 1 – 4 of 4) sorted by relevance

/external/mesa3d/src/gallium/drivers/r300/compiler/
Dradeon_compiler_util.c370 const struct rc_src_register * ReplaceReg; member
399 if (!d->ReplaceRemoved && src == d->ReplaceReg) { in can_use_presub_read_cb()
445 d.ReplaceReg = replace_reg; in rc_inst_can_use_presub()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUMachineCFGStructurizer.cpp1114 unsigned *ReplaceReg);
1118 SmallVector<unsigned, 2> &PHIIndices, unsigned *ReplaceReg);
1447 unsigned *ReplaceReg) { in shrinkPHI() argument
1448 return shrinkPHI(PHI, 0, nullptr, PHIIndices, ReplaceReg); in shrinkPHI()
1455 unsigned *ReplaceReg) { in shrinkPHI() argument
1477 *ReplaceReg = getPHISourceReg(PHI, SingleExternalEntryIndex); in shrinkPHI()
2443 unsigned ReplaceReg; in splitLoopPHI() local
2445 if (shrinkPHI(PHI, PHIRegionIndices, &ReplaceReg)) { in splitLoopPHI()
2446 PHISource = ReplaceReg; in splitLoopPHI()
/external/llvm/lib/CodeGen/
DMachinePipeliner.cpp3273 unsigned ReplaceReg = 0; in rewriteScheduledInstr() local
3278 ReplaceReg = PrevReg; in rewriteScheduledInstr()
3281 ReplaceReg = PrevReg; in rewriteScheduledInstr()
3283 ReplaceReg = NewReg; in rewriteScheduledInstr()
3289 ReplaceReg = NewReg; in rewriteScheduledInstr()
3291 ReplaceReg = NewReg; in rewriteScheduledInstr()
3293 ReplaceReg = NewReg; in rewriteScheduledInstr()
3294 if (ReplaceReg) { in rewriteScheduledInstr()
3295 MRI.constrainRegClass(ReplaceReg, MRI.getRegClass(OldReg)); in rewriteScheduledInstr()
3296 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMachinePipeliner.cpp3396 unsigned ReplaceReg = 0; in rewriteScheduledInstr() local
3401 ReplaceReg = PrevReg; in rewriteScheduledInstr()
3404 ReplaceReg = PrevReg; in rewriteScheduledInstr()
3406 ReplaceReg = NewReg; in rewriteScheduledInstr()
3412 ReplaceReg = NewReg; in rewriteScheduledInstr()
3414 ReplaceReg = NewReg; in rewriteScheduledInstr()
3416 ReplaceReg = NewReg; in rewriteScheduledInstr()
3417 if (ReplaceReg) { in rewriteScheduledInstr()
3418 MRI.constrainRegClass(ReplaceReg, MRI.getRegClass(OldReg)); in rewriteScheduledInstr()
3419 UseOp.setReg(ReplaceReg); in rewriteScheduledInstr()