Searched refs:ReservedRegs (Results 1 – 8 of 8) sorted by relevance
64 BitVector ReservedRegs; variable129 bool isReserved(unsigned Reg) const { return ReservedRegs.test(Reg); } in isReserved()
63 RegsAvailable ^= ReservedRegs; in initRegState()95 ReservedRegs = TRI->getReservedRegs(MF); in enterBasicBlock()235 used = ~RegsAvailable & ~ReservedRegs; in getRegsUsed()
92 BitVector ReservedRegs = TRI->getReservedRegs(MF); in runOnMachineFunction() local102 LivePhysRegs = ReservedRegs; in runOnMachineFunction()
441 BitVector ReservedRegs = TRI->getReservedRegs(MF); in FixupKills() local482 if ((Reg == 0) || ReservedRegs.test(Reg)) continue; in FixupKills()518 if ((Reg == 0) || ReservedRegs.test(Reg)) continue; in FixupKills()
105 BitVector ReservedRegs; variable746 return !ReservedRegs.empty(); in reservedRegsFrozen()753 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg); in canReserveReg()763 return ReservedRegs; in getReservedRegs()
137 BitVector ReservedRegs; variable854 return !ReservedRegs.empty(); in reservedRegsFrozen()861 return !reservedRegsFrozen() || ReservedRegs.test(PhysReg); in canReserveReg()871 return ReservedRegs; in getReservedRegs()
442 ReservedRegs = getTargetRegisterInfo()->getReservedRegs(MF); in freezeReservedRegs()443 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()
509 ReservedRegs = getTargetRegisterInfo()->getReservedRegs(MF); in freezeReservedRegs()510 assert(ReservedRegs.size() == getTargetRegisterInfo()->getNumRegs() && in freezeReservedRegs()