Searched refs:Rsrc (Results 1 – 3 of 3) sorted by relevance
| /external/boringssl/src/ssl/test/runner/poly1305/ |
| D | sum_arm.s | 58 #define MOVW_UNALIGNED(Rsrc, Rdst, Rtmp, offset) \ argument
59 MOVBU (offset+0)(Rsrc), Rtmp; \
61 MOVBU (offset+1)(Rsrc), Rtmp; \
63 MOVBU (offset+2)(Rsrc), Rtmp; \
65 MOVBU (offset+3)(Rsrc), Rtmp; \
218 #define MOVHUP_UNALIGNED(Rsrc, Rdst, Rtmp) \ argument
219 MOVBU.P 1(Rsrc), Rtmp; \
221 MOVBU.P 1(Rsrc), Rtmp; \
224 #define MOVWP_UNALIGNED(Rsrc, Rdst, Rtmp) \ argument
225 MOVHUP_UNALIGNED(Rsrc, Rdst, Rtmp); \
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 906 bool AMDGPUDAGToDAGISel::SelectMUBUFScratch(SDValue Addr, SDValue &Rsrc, in SelectMUBUFScratch() argument
914 Rsrc = CurDAG->getRegister(Info->getScratchRSrcReg(), MVT::v4i32); in SelectMUBUFScratch()
952 uint64_t Rsrc = TII->getDefaultRsrcDataFormat() | in SelectMUBUFOffset() local
959 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 1119 SDValue Addr, SDValue &Rsrc, in SelectMUBUFScratchOffen() argument
1127 Rsrc = CurDAG->getRegister(Info->getScratchRSrcReg(), MVT::v4i32); in SelectMUBUFScratchOffen()
1227 uint64_t Rsrc = TII->getDefaultRsrcDataFormat() | in SelectMUBUFOffset() local
1234 SRsrc = SDValue(Lowering.buildRSRC(*CurDAG, DL, Ptr, 0, Rsrc), 0); in SelectMUBUFOffset()
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