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Searched refs:S14 (Results 1 – 25 of 38) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/
DConcatenatedSubregs.td46 def S14 : MyReg<"s14">;
58 def D7 : MyReg<"d7", [S14, S15]>;
84 // CHECK: Regs: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15
125 // CHECK-NEXT: SubReg ssub4 = S14
/external/dng_sdk/source/
Ddng_fingerprint.cpp465 S14 = 22, in MD5Transform() enumerator
515 FF (b, c, d, a, x[ 3], S14, 0xc1bdceee); /* 4 */ in MD5Transform()
519 FF (b, c, d, a, x[ 7], S14, 0xfd469501); /* 8 */ in MD5Transform()
523 FF (b, c, d, a, x[11], S14, 0x895cd7be); /* 12 */ in MD5Transform()
527 FF (b, c, d, a, x[15], S14, 0x49b40821); /* 16 */ in MD5Transform()
/external/ppp/pppd/
Dmd5.c213 #define S14 22 macro
217 FF ( b, c, d, a, in[ 3], S14, UL(3250441966)); /* 4 */
221 FF ( b, c, d, a, in[ 7], S14, UL(4249261313)); /* 8 */
225 FF ( b, c, d, a, in[11], S14, UL(2304563134)); /* 12 */
229 FF ( b, c, d, a, in[15], S14, UL(1236535329)); /* 16 */
/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/crypto/digests/
DMD5Digest.java159 private static final int S14 = 22; field in MD5Digest
243 b = rotateLeft(b + F(c, d, a) + X[ 3] + 0xc1bdceee, S14) + c; in processBlock()
247 b = rotateLeft(b + F(c, d, a) + X[ 7] + 0xfd469501, S14) + c; in processBlock()
251 b = rotateLeft(b + F(c, d, a) + X[11] + 0x895cd7be, S14) + c; in processBlock()
255 b = rotateLeft(b + F(c, d, a) + X[15] + 0x49b40821, S14) + c; in processBlock()
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/digests/
DMD5Digest.java157 private static final int S14 = 22; field in MD5Digest
241 b = rotateLeft(b + F(c, d, a) + X[ 3] + 0xc1bdceee, S14) + c; in processBlock()
245 b = rotateLeft(b + F(c, d, a) + X[ 7] + 0xfd469501, S14) + c; in processBlock()
249 b = rotateLeft(b + F(c, d, a) + X[11] + 0x895cd7be, S14) + c; in processBlock()
253 b = rotateLeft(b + F(c, d, a) + X[15] + 0x49b40821, S14) + c; in processBlock()
/external/clang/test/PCH/
Dcxx-key-functions.cpp22 struct S14 { virtual void f(); }; struct
83 S10, S11, S12, S13, S14, S15, S16, S17, S18, S19,
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMCallingConv.td69 S9, S10, S11, S12, S13, S14, S15]>>,
81 S9, S10, S11, S12, S13, S14, S15]>>,
169 S9, S10, S11, S12, S13, S14, S15]>>,
181 S9, S10, S11, S12, S13, S14, S15]>>,
DARMRegisterInfo.td81 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">;
100 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
DARMBaseRegisterInfo.cpp712 case ARM::S15: return ARM::S14; in getRegisterPairEven()
765 case ARM::S14: return ARM::S15; in getRegisterPairOdd()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMCallingConv.td78 S9, S10, S11, S12, S13, S14, S15]>>,
97 S9, S10, S11, S12, S13, S14, S15]>>,
219 S9, S10, S11, S12, S13, S14, S15]>>,
237 S9, S10, S11, S12, S13, S14, S15]>>,
DARMCallingConv.h168 ARM::S12, ARM::S13, ARM::S14, ARM::S15 };
DARMRegisterInfo.td100 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">;
119 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
/external/llvm/lib/Target/ARM/
DARMCallingConv.td78 S9, S10, S11, S12, S13, S14, S15]>>,
97 S9, S10, S11, S12, S13, S14, S15]>>,
218 S9, S10, S11, S12, S13, S14, S15]>>,
236 S9, S10, S11, S12, S13, S14, S15]>>,
DARMCallingConv.h168 ARM::S12, ARM::S13, ARM::S14, ARM::S15 };
DARMRegisterInfo.td88 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">;
107 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
/external/clang/test/CodeGenCXX/
Dmicrosoft-abi-static-initializers.cpp73 static S S14; in MultipleStatics() local
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMBaseInfo.h169 case LR: case S14: case D14: case Q14: return 14; in getARMRegisterNumbering()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenCallingConv.inc295 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
531 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
740 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
889 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp104 case AArch64::S14: in isOdd()
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp104 case AArch64::S14: in isOdd()
DAArch64RegisterInfo.td299 def S14 : AArch64Reg<14, "s14", [H14]>, DwarfRegAlias<B14>;
334 def D14 : AArch64Reg<14, "d14", [S14], ["v14", ""]>, DwarfRegAlias<B14>;
/external/libavc/encoder/arm/
Dime_distortion_metrics_a9q.s1023 @S13 S14 S15 S16 A13 A14 A15 A16
1063 @ D16 S14 A14 S23 A23
1066 @D16 S14 S23 A14 A23
1197 @D16 S14 S23 A14 A23
/external/eigen/Eigen/src/Core/arch/AVX512/
DPacketMath.h1080 __m512 S14 = _mm512_shuffle_ps(T13, T15, _MM_SHUFFLE(1, 0, 1, 0));
1097 EIGEN_EXTRACT_8f_FROM_16f(S14, S14);
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp233 PPC::S12, PPC::S13, PPC::S14, PPC::S15,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCCallingConv.td295 def CSR_SPE : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21, S22,

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