/external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
D | ConcatenatedSubregs.td | 46 def S14 : MyReg<"s14">; 58 def D7 : MyReg<"d7", [S14, S15]>; 84 // CHECK: Regs: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15 125 // CHECK-NEXT: SubReg ssub4 = S14
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/external/dng_sdk/source/ |
D | dng_fingerprint.cpp | 465 S14 = 22, in MD5Transform() enumerator 515 FF (b, c, d, a, x[ 3], S14, 0xc1bdceee); /* 4 */ in MD5Transform() 519 FF (b, c, d, a, x[ 7], S14, 0xfd469501); /* 8 */ in MD5Transform() 523 FF (b, c, d, a, x[11], S14, 0x895cd7be); /* 12 */ in MD5Transform() 527 FF (b, c, d, a, x[15], S14, 0x49b40821); /* 16 */ in MD5Transform()
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/external/ppp/pppd/ |
D | md5.c | 213 #define S14 22 macro 217 FF ( b, c, d, a, in[ 3], S14, UL(3250441966)); /* 4 */ 221 FF ( b, c, d, a, in[ 7], S14, UL(4249261313)); /* 8 */ 225 FF ( b, c, d, a, in[11], S14, UL(2304563134)); /* 12 */ 229 FF ( b, c, d, a, in[15], S14, UL(1236535329)); /* 16 */
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/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/crypto/digests/ |
D | MD5Digest.java | 159 private static final int S14 = 22; field in MD5Digest 243 b = rotateLeft(b + F(c, d, a) + X[ 3] + 0xc1bdceee, S14) + c; in processBlock() 247 b = rotateLeft(b + F(c, d, a) + X[ 7] + 0xfd469501, S14) + c; in processBlock() 251 b = rotateLeft(b + F(c, d, a) + X[11] + 0x895cd7be, S14) + c; in processBlock() 255 b = rotateLeft(b + F(c, d, a) + X[15] + 0x49b40821, S14) + c; in processBlock()
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/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/digests/ |
D | MD5Digest.java | 157 private static final int S14 = 22; field in MD5Digest 241 b = rotateLeft(b + F(c, d, a) + X[ 3] + 0xc1bdceee, S14) + c; in processBlock() 245 b = rotateLeft(b + F(c, d, a) + X[ 7] + 0xfd469501, S14) + c; in processBlock() 249 b = rotateLeft(b + F(c, d, a) + X[11] + 0x895cd7be, S14) + c; in processBlock() 253 b = rotateLeft(b + F(c, d, a) + X[15] + 0x49b40821, S14) + c; in processBlock()
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/external/clang/test/PCH/ |
D | cxx-key-functions.cpp | 22 struct S14 { virtual void f(); }; struct 83 S10, S11, S12, S13, S14, S15, S16, S17, S18, S19,
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMCallingConv.td | 69 S9, S10, S11, S12, S13, S14, S15]>>, 81 S9, S10, S11, S12, S13, S14, S15]>>, 169 S9, S10, S11, S12, S13, S14, S15]>>, 181 S9, S10, S11, S12, S13, S14, S15]>>,
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D | ARMRegisterInfo.td | 81 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">; 100 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
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D | ARMBaseRegisterInfo.cpp | 712 case ARM::S15: return ARM::S14; in getRegisterPairEven() 765 case ARM::S14: return ARM::S15; in getRegisterPairOdd()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMCallingConv.td | 78 S9, S10, S11, S12, S13, S14, S15]>>, 97 S9, S10, S11, S12, S13, S14, S15]>>, 219 S9, S10, S11, S12, S13, S14, S15]>>, 237 S9, S10, S11, S12, S13, S14, S15]>>,
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D | ARMCallingConv.h | 168 ARM::S12, ARM::S13, ARM::S14, ARM::S15 };
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D | ARMRegisterInfo.td | 100 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">; 119 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
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/external/llvm/lib/Target/ARM/ |
D | ARMCallingConv.td | 78 S9, S10, S11, S12, S13, S14, S15]>>, 97 S9, S10, S11, S12, S13, S14, S15]>>, 218 S9, S10, S11, S12, S13, S14, S15]>>, 236 S9, S10, S11, S12, S13, S14, S15]>>,
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D | ARMCallingConv.h | 168 ARM::S12, ARM::S13, ARM::S14, ARM::S15 };
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D | ARMRegisterInfo.td | 88 def S14 : ARMFReg<14, "s14">; def S15 : ARMFReg<15, "s15">; 107 def D7 : ARMReg< 7, "d7", [S14, S15]>, DwarfRegNum<[263]>;
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/external/clang/test/CodeGenCXX/ |
D | microsoft-abi-static-initializers.cpp | 73 static S S14; in MultipleStatics() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 169 case LR: case S14: case D14: case Q14: return 14; in getARMRegisterNumbering()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenCallingConv.inc | 295 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15 531 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15 740 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15 889 …:S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10, ARM::S11, ARM::S12, ARM::S13, ARM::S14, ARM::S15
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 104 case AArch64::S14: in isOdd()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 104 case AArch64::S14: in isOdd()
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D | AArch64RegisterInfo.td | 299 def S14 : AArch64Reg<14, "s14", [H14]>, DwarfRegAlias<B14>; 334 def D14 : AArch64Reg<14, "d14", [S14], ["v14", ""]>, DwarfRegAlias<B14>;
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/external/libavc/encoder/arm/ |
D | ime_distortion_metrics_a9q.s | 1023 @S13 S14 S15 S16 A13 A14 A15 A16 1063 @ D16 S14 A14 S23 A23 1066 @D16 S14 S23 A14 A23 1197 @D16 S14 S23 A14 A23
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/external/eigen/Eigen/src/Core/arch/AVX512/ |
D | PacketMath.h | 1080 __m512 S14 = _mm512_shuffle_ps(T13, T15, _MM_SHUFFLE(1, 0, 1, 0)); 1097 EIGEN_EXTRACT_8f_FROM_16f(S14, S14);
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 233 PPC::S12, PPC::S13, PPC::S14, PPC::S15,
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCCallingConv.td | 295 def CSR_SPE : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21, S22,
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