| /external/boringssl/src/crypto/poly1305/ |
| D | poly1305_vec.c | 65 } R20, R21, R22, R23, R24, S21, S22, S23, S24; member
197 p->S24.v = _mm_mul_epu32(p->R24.v, FIVE); in poly1305_first_block()
253 T5 = _mm_mul_epu32(H1, p->S24.v); in poly1305_blocks()
258 T6 = _mm_mul_epu32(H2, p->S24.v); in poly1305_blocks()
277 T5 = _mm_mul_epu32(H3, p->S24.v); in poly1305_blocks()
282 T6 = _mm_mul_epu32(H4, p->S24.v); in poly1305_blocks()
311 T5 = _mm_mul_epu32(M1, p->S24.v); in poly1305_blocks()
316 T6 = _mm_mul_epu32(M2, p->S24.v); in poly1305_blocks()
339 T5 = _mm_mul_epu32(M3, p->S24.v); in poly1305_blocks()
344 T6 = _mm_mul_epu32(M4, p->S24.v); in poly1305_blocks()
[all …]
|
| /external/dng_sdk/source/ |
| D | dng_fingerprint.cpp | 469 S24 = 20, in MD5Transform() enumerator
533 GG (b, c, d, a, x[ 0], S24, 0xe9b6c7aa); /* 20 */ in MD5Transform()
537 GG (b, c, d, a, x[ 4], S24, 0xe7d3fbc8); /* 24 */ in MD5Transform()
541 GG (b, c, d, a, x[ 8], S24, 0x455a14ed); /* 28 */ in MD5Transform()
545 GG (b, c, d, a, x[12], S24, 0x8d2a4c8a); /* 32 */ in MD5Transform()
|
| /external/ppp/pppd/ |
| D | md5.c | 235 #define S24 20 macro
239 GG ( b, c, d, a, in[ 0], S24, UL(3921069994)); /* 20 */
243 GG ( b, c, d, a, in[ 4], S24, UL(3889429448)); /* 24 */
247 GG ( b, c, d, a, in[ 8], S24, UL(1163531501)); /* 28 */
251 GG ( b, c, d, a, in[12], S24, UL(2368359562)); /* 32 */
|
| /external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/crypto/digests/ |
| D | MD5Digest.java | 167 private static final int S24 = 20; field in MD5Digest
263 b = rotateLeft(b + G(c, d, a) + X[ 0] + 0xe9b6c7aa, S24) + c; in processBlock()
267 b = rotateLeft(b + G(c, d, a) + X[ 4] + 0xe7d3fbc8, S24) + c; in processBlock()
271 b = rotateLeft(b + G(c, d, a) + X[ 8] + 0x455a14ed, S24) + c; in processBlock()
275 b = rotateLeft(b + G(c, d, a) + X[12] + 0x8d2a4c8a, S24) + c; in processBlock()
|
| /external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/digests/ |
| D | MD5Digest.java | 165 private static final int S24 = 20; field in MD5Digest
261 b = rotateLeft(b + G(c, d, a) + X[ 0] + 0xe9b6c7aa, S24) + c; in processBlock()
265 b = rotateLeft(b + G(c, d, a) + X[ 4] + 0xe7d3fbc8, S24) + c; in processBlock()
269 b = rotateLeft(b + G(c, d, a) + X[ 8] + 0x455a14ed, S24) + c; in processBlock()
273 b = rotateLeft(b + G(c, d, a) + X[12] + 0x8d2a4c8a, S24) + c; in processBlock()
|
| /external/clang/test/PCH/ |
| D | cxx-key-functions.cpp | 32 struct S24 { virtual void f(); }; struct
84 S20, S21, S22, S23, S24, S25, S26, S27, S28, S29,
|
| /external/clang/test/CodeGenCXX/ |
| D | microsoft-abi-static-initializers.cpp | 83 static S S24; in MultipleStatics() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 180 case S24: case D24: return 24; in getARMRegisterNumbering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 86 def S24 : ARMFReg<24, "s24">; def S25 : ARMFReg<25, "s25">;
105 def D12 : ARMReg<12, "d12", [S24, S25]>, DwarfRegNum<[268]>;
|
| D | ARMBaseRegisterInfo.cpp | 717 case ARM::S25: return ARM::S24; in getRegisterPairEven()
770 case ARM::S24: return ARM::S25; in getRegisterPairOdd()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 109 case AArch64::S24: in isOdd()
|
| D | AArch64RegisterInfo.td | 328 def S24 : AArch64Reg<24, "s24", [H24]>, DwarfRegAlias<B24>;
363 def D24 : AArch64Reg<24, "d24", [S24], ["v24", ""]>, DwarfRegAlias<B24>;
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 109 case AArch64::S24: in isOdd()
|
| D | AArch64RegisterInfo.td | 309 def S24 : AArch64Reg<24, "s24", [H24]>, DwarfRegAlias<B24>;
344 def D24 : AArch64Reg<24, "d24", [S24], ["v24", ""]>, DwarfRegAlias<B24>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 93 def S24 : ARMFReg<24, "s24">; def S25 : ARMFReg<25, "s25">;
112 def D12 : ARMReg<12, "d12", [S24, S25]>, DwarfRegNum<[268]>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 105 def S24 : ARMFReg<24, "s24">; def S25 : ARMFReg<25, "s25">;
124 def D12 : ARMReg<12, "d12", [S24, S25]>, DwarfRegNum<[268]>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 236 PPC::S24, PPC::S25, PPC::S26, PPC::S27,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 296 S23, S24, S25, S26, S27, S28, S29, S30, S31
|
| D | PPCFrameLowering.cpp | 186 {PPC::S24, -64}, in getCalleeSavedSpillSlots()
|
| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | b0d03ab54e6515e7fc335e4b60952ceb.0000ed24.honggfuzz.cov | 257 …<�O�`ٛA��=v��h[�_����>��0M�ah���M�P.P �D����9)�b�Cn�����YP)0u��P�E9A�*S24=��n]�QR|�B�n��-��x…
305 …<�O�`ٛA��=v��h[�_����>��0M�ah���M�P.P �D����9)�b�Cn�����YP)0u��P�E9A�*S24=��n]�QR|�B�n��-��x…
353 …<�O�`ٛA��=v��h[�_����>��0M�ah���M�P.P �D����9)�b�Cn�����YP)0u��P�E9A�*S24=��n]�QR|�B�n��-��x…
|
| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | b0d03ab54e6515e7fc335e4b60952ceb.0000ed24.honggfuzz.cov | 257 …<�O�`ٛA��=v��h[�_����>��0M�ah���M�P.P �D����9)�b�Cn�����YP)0u��P�E9A�*S24=��n]�QR|�B�n��-��x…
305 …<�O�`ٛA��=v��h[�_����>��0M�ah���M�P.P �D����9)�b�Cn�����YP)0u��P�E9A�*S24=��n]�QR|�B�n��-��x…
353 …<�O�`ٛA��=v��h[�_����>��0M�ah���M�P.P �D����9)�b�Cn�����YP)0u��P�E9A�*S24=��n]�QR|�B�n��-��x…
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenRegisterInfo.inc | 123 S24 = 103,
1468 { ARM::S24 },
1514 …ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26…
1524 …ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26…
5233 …ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28…
5234 …Order2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2,…
5251 …ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24, ARM::S26, ARM::S28…
5252 …Order2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, ARM::S24, ARM::S28, ARM::S2,…
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 310 AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 351 AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 93 PPC::S24, PPC::S25, PPC::S26, PPC::S27,
|