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Searched refs:S31 (Results 1 – 25 of 37) sorted by relevance

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/external/dng_sdk/source/
Ddng_fingerprint.cpp470 S31 = 4, in MD5Transform() enumerator
548 HH (a, b, c, d, x[ 5], S31, 0xfffa3942); /* 33 */ in MD5Transform()
552 HH (a, b, c, d, x[ 1], S31, 0xa4beea44); /* 37 */ in MD5Transform()
556 HH (a, b, c, d, x[13], S31, 0x289b7ec6); /* 41 */ in MD5Transform()
560 HH (a, b, c, d, x[ 9], S31, 0xd9d4d039); /* 45 */ in MD5Transform()
/external/ppp/pppd/
Dmd5.c254 #define S31 4 macro
258 HH ( a, b, c, d, in[ 5], S31, UL(4294588738)); /* 33 */
262 HH ( a, b, c, d, in[ 1], S31, UL(2763975236)); /* 37 */
266 HH ( a, b, c, d, in[13], S31, UL( 681279174)); /* 41 */
270 HH ( a, b, c, d, in[ 9], S31, UL(3654602809)); /* 45 */
/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/crypto/digests/
DMD5Digest.java172 private static final int S31 = 4; field in MD5Digest
280 a = rotateLeft(a + H(b, c, d) + X[ 5] + 0xfffa3942, S31) + b; in processBlock()
284 a = rotateLeft(a + H(b, c, d) + X[ 1] + 0xa4beea44, S31) + b; in processBlock()
288 a = rotateLeft(a + H(b, c, d) + X[13] + 0x289b7ec6, S31) + b; in processBlock()
292 a = rotateLeft(a + H(b, c, d) + X[ 9] + 0xd9d4d039, S31) + b; in processBlock()
/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/digests/
DMD5Digest.java170 private static final int S31 = 4; field in MD5Digest
278 a = rotateLeft(a + H(b, c, d) + X[ 5] + 0xfffa3942, S31) + b; in processBlock()
282 a = rotateLeft(a + H(b, c, d) + X[ 1] + 0xa4beea44, S31) + b; in processBlock()
286 a = rotateLeft(a + H(b, c, d) + X[13] + 0x289b7ec6, S31) + b; in processBlock()
290 a = rotateLeft(a + H(b, c, d) + X[ 9] + 0xd9d4d039, S31) + b; in processBlock()
/external/clang/test/PCH/
Dcxx-key-functions.cpp39 struct S31 { virtual void f(); }; struct
85 S30, S31, S32, S33, S34, S35, S36, S37, S38, S39,
/external/clang/test/CodeGenCXX/
Dmicrosoft-abi-static-initializers.cpp90 static S S31; in MultipleStatics() local
/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/
DARMBaseInfo.h187 case S31: case D31: return 31; in getARMRegisterNumbering()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMRegisterInfo.td89 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">;
108 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
DARMBaseRegisterInfo.cpp720 case ARM::S31: return ARM::S30; in getRegisterPairEven()
773 case ARM::S30: return ARM::S31; in getRegisterPairOdd()
DARMAsmPrinter.cpp238 if (Reg >= ARM::S0 && Reg <= ARM::S31) { in EmitDwarfRegOp()
239 assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); in EmitDwarfRegOp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp63 case AArch64::S31: in isOdd()
DAArch64AsmPrinter.cpp510 else if (AArch64::S0 <= DestReg && DestReg <= AArch64::S31) in EmitFMov0()
DAArch64RegisterInfo.td335 def S31 : AArch64Reg<31, "s31", [H31]>, DwarfRegAlias<B31>;
370 def D31 : AArch64Reg<31, "d31", [S31], ["v31", ""]>, DwarfRegAlias<B31>;
/external/llvm/lib/Target/AArch64/
DAArch64PBQPRegAlloc.cpp63 case AArch64::S31: in isOdd()
DAArch64AsmPrinter.cpp427 if (AArch64::S0 <= DestReg && DestReg <= AArch64::S31) { in EmitFMov0()
DAArch64RegisterInfo.td316 def S31 : AArch64Reg<31, "s31", [H31]>, DwarfRegAlias<B31>;
351 def D31 : AArch64Reg<31, "d31", [S31], ["v31", ""]>, DwarfRegAlias<B31>;
/external/protobuf/src/google/protobuf/stubs/
Dstructurally_valid.cc77 #define S31 (kExitReplace31) macro
339 #undef S31
/external/llvm/lib/Target/ARM/
DARMRegisterInfo.td96 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">;
115 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMRegisterInfo.td108 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">;
127 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/
DPPCDisassembler.cpp237 PPC::S28, PPC::S29, PPC::S30, PPC::S31
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td300 S31, S0, S1)>;
DPPCCallingConv.td296 S23, S24, S25, S26, S27, S28, S29, S30, S31
DPPCFrameLowering.cpp179 {PPC::S31, -8}, in getCalleeSavedSpillSlots()
1699 unsigned MinVR = Subtarget.hasSPE() ? PPC::S31 : PPC::V31; in processFunctionBeforeFrameFinalized()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/
DARMGenRegisterInfo.inc130 S31 = 110,
1475 { ARM::S31 },
1514 …RM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31,
1524 …RM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31,
5233 …M::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 };
5234 …ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
5251 …M::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 };
5252 …ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
/external/llvm/lib/Target/AArch64/Disassembler/
DAArch64Disassembler.cpp312 AArch64::S30, AArch64::S31

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