/external/dng_sdk/source/ |
D | dng_fingerprint.cpp | 470 S31 = 4, in MD5Transform() enumerator 548 HH (a, b, c, d, x[ 5], S31, 0xfffa3942); /* 33 */ in MD5Transform() 552 HH (a, b, c, d, x[ 1], S31, 0xa4beea44); /* 37 */ in MD5Transform() 556 HH (a, b, c, d, x[13], S31, 0x289b7ec6); /* 41 */ in MD5Transform() 560 HH (a, b, c, d, x[ 9], S31, 0xd9d4d039); /* 45 */ in MD5Transform()
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/external/ppp/pppd/ |
D | md5.c | 254 #define S31 4 macro 258 HH ( a, b, c, d, in[ 5], S31, UL(4294588738)); /* 33 */ 262 HH ( a, b, c, d, in[ 1], S31, UL(2763975236)); /* 37 */ 266 HH ( a, b, c, d, in[13], S31, UL( 681279174)); /* 41 */ 270 HH ( a, b, c, d, in[ 9], S31, UL(3654602809)); /* 45 */
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/external/bouncycastle/repackaged/bcprov/src/main/java/com/android/org/bouncycastle/crypto/digests/ |
D | MD5Digest.java | 172 private static final int S31 = 4; field in MD5Digest 280 a = rotateLeft(a + H(b, c, d) + X[ 5] + 0xfffa3942, S31) + b; in processBlock() 284 a = rotateLeft(a + H(b, c, d) + X[ 1] + 0xa4beea44, S31) + b; in processBlock() 288 a = rotateLeft(a + H(b, c, d) + X[13] + 0x289b7ec6, S31) + b; in processBlock() 292 a = rotateLeft(a + H(b, c, d) + X[ 9] + 0xd9d4d039, S31) + b; in processBlock()
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/external/bouncycastle/bcprov/src/main/java/org/bouncycastle/crypto/digests/ |
D | MD5Digest.java | 170 private static final int S31 = 4; field in MD5Digest 278 a = rotateLeft(a + H(b, c, d) + X[ 5] + 0xfffa3942, S31) + b; in processBlock() 282 a = rotateLeft(a + H(b, c, d) + X[ 1] + 0xa4beea44, S31) + b; in processBlock() 286 a = rotateLeft(a + H(b, c, d) + X[13] + 0x289b7ec6, S31) + b; in processBlock() 290 a = rotateLeft(a + H(b, c, d) + X[ 9] + 0xd9d4d039, S31) + b; in processBlock()
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/external/clang/test/PCH/ |
D | cxx-key-functions.cpp | 39 struct S31 { virtual void f(); }; struct 85 S30, S31, S32, S33, S34, S35, S36, S37, S38, S39,
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/external/clang/test/CodeGenCXX/ |
D | microsoft-abi-static-initializers.cpp | 90 static S S31; in MultipleStatics() local
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
D | ARMBaseInfo.h | 187 case S31: case D31: return 31; in getARMRegisterNumbering()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 89 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">; 108 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
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D | ARMBaseRegisterInfo.cpp | 720 case ARM::S31: return ARM::S30; in getRegisterPairEven() 773 case ARM::S30: return ARM::S31; in getRegisterPairOdd()
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D | ARMAsmPrinter.cpp | 238 if (Reg >= ARM::S0 && Reg <= ARM::S31) { in EmitDwarfRegOp() 239 assert(ARM::S0 + 31 == ARM::S31 && "Unexpected ARM S register numbering"); in EmitDwarfRegOp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 63 case AArch64::S31: in isOdd()
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D | AArch64AsmPrinter.cpp | 510 else if (AArch64::S0 <= DestReg && DestReg <= AArch64::S31) in EmitFMov0()
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D | AArch64RegisterInfo.td | 335 def S31 : AArch64Reg<31, "s31", [H31]>, DwarfRegAlias<B31>; 370 def D31 : AArch64Reg<31, "d31", [S31], ["v31", ""]>, DwarfRegAlias<B31>;
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/external/llvm/lib/Target/AArch64/ |
D | AArch64PBQPRegAlloc.cpp | 63 case AArch64::S31: in isOdd()
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D | AArch64AsmPrinter.cpp | 427 if (AArch64::S0 <= DestReg && DestReg <= AArch64::S31) { in EmitFMov0()
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D | AArch64RegisterInfo.td | 316 def S31 : AArch64Reg<31, "s31", [H31]>, DwarfRegAlias<B31>; 351 def D31 : AArch64Reg<31, "d31", [S31], ["v31", ""]>, DwarfRegAlias<B31>;
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/external/protobuf/src/google/protobuf/stubs/ |
D | structurally_valid.cc | 77 #define S31 (kExitReplace31) macro 339 #undef S31
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/external/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 96 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">; 115 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMRegisterInfo.td | 108 def S30 : ARMFReg<30, "s30">; def S31 : ARMFReg<31, "s31">; 127 def D15 : ARMReg<15, "d15", [S30, S31]>, DwarfRegNum<[271]>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
D | PPCDisassembler.cpp | 237 PPC::S28, PPC::S29, PPC::S30, PPC::S31
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCRegisterInfo.td | 300 S31, S0, S1)>;
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D | PPCCallingConv.td | 296 S23, S24, S25, S26, S27, S28, S29, S30, S31
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D | PPCFrameLowering.cpp | 179 {PPC::S31, -8}, in getCalleeSavedSpillSlots() 1699 unsigned MinVR = Subtarget.hasSPE() ? PPC::S31 : PPC::V31; in processFunctionBeforeFrameFinalized()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenRegisterInfo.inc | 130 S31 = 110, 1475 { ARM::S31 }, 1514 …RM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, 1524 …RM::S22, ARM::S23, ARM::S24, ARM::S25, ARM::S26, ARM::S27, ARM::S28, ARM::S29, ARM::S30, ARM::S31, 5233 …M::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 }; 5234 …ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 }; 5251 …M::S13, ARM::S15, ARM::S17, ARM::S19, ARM::S21, ARM::S23, ARM::S25, ARM::S27, ARM::S29, ARM::S31 }; 5252 …ARM::S25, ARM::S29, ARM::S3, ARM::S7, ARM::S11, ARM::S15, ARM::S19, ARM::S23, ARM::S27, ARM::S31 };
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/external/llvm/lib/Target/AArch64/Disassembler/ |
D | AArch64Disassembler.cpp | 312 AArch64::S30, AArch64::S31
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