| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/ |
| D | ARCInstrFormats.td | 44 let MIOperandInfo = (ops GPR32:$B, immS<9>:$S9);
169 // |B[2-0] |S9[7-1] | 1|S9[8]|B[5-3] |C |N|u|0|cc |
178 bits<9> S9; // 2-byte aligned 9-bit byte-offset.
182 let Inst{23-17} = S9{7-1};
184 let Inst{15} = S9{8};
338 // Register + S9 Load. (B + S9)
340 // |B[2-0] |S9[7-0] |S9[8]|B[5-3] |di|aa |zz |x|A |
346 bits<9> S9;
350 let Inst{23-16} = S9{7-0};
351 let Inst{15} = S9{8};
[all …]
|
| D | ARCInstrInfo.td | 336 (ins btargetS9:$S9, GPR32:$B, GPR32:$C, brccond:$cc),
337 "br$cc\t$B, $C, $S9", 0, []>;
339 (ins btargetS9:$S9, GPR32:$B, immU6:$C, brccond:$cc),
340 "br$cc\t$B, $C, $S9", 1, []>;
825 (ins GPR32:$B, immS<9>:$S9),
826 !strconcat(asmop, ".ab\t$A, [$B,$S9]"), []>
885 (ins GPR32:$C, GPR32:$B, immS<9>:$S9),
886 !strconcat(asmop, ".aw\t$C, [$B,$S9]"), []>
|
| /external/clang/test/CodeGenCXX/ |
| D | warn-padded-packed.cpp | 49 struct S9 { // expected-warning {{packed attribute is unnecessary for 'S9'}} struct
76 void f(S1*, S2*, S3*, S4*, S5*, S6*, S7*, S8*, S9*, S10*, S11*, S12*, S13*) { } in f() argument
|
| D | microsoft-abi-static-initializers.cpp | 68 static S S9; in MultipleStatics() local
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
| D | ConcatenatedSubregs.td | 41 def S9 : MyReg<"s9">;
55 def D4 : MyReg<"d4", [S8, S9]>;
84 // CHECK: Regs: S0 S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13 S14 S15
108 // CHECK-NEXT: SubReg ssub0 = S9
|
| D | ForeachLoop.td | 64 // CHECK: def S9
|
| /external/u-boot/arch/arm/dts/ |
| D | bitmain-antminer-s9.dts | 3 * Bitmain Antminer S9 board DTS
12 model = "Bitmain Antminer S9 Board";
|
| /external/clang/test/CodeGenObjC/ |
| D | encode-test.m | 148 // CHECK: @g9 = constant [11 x i8] c"{S9=i[0i]}\00"
149 struct S9 {
153 const char g9[] = @encode(struct S9);
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMCallingConv.td | 69 S9, S10, S11, S12, S13, S14, S15]>>,
81 S9, S10, S11, S12, S13, S14, S15]>>,
169 S9, S10, S11, S12, S13, S14, S15]>>,
181 S9, S10, S11, S12, S13, S14, S15]>>,
|
| /external/clang/test/SemaCXX/ |
| D | warn-comma-operator.cpp | 147 class S9 { class
158 for (S9 s; s.More(); s.Advance(), ++x) {} in test9()
|
| /external/u-boot/board/bitmain/antminer_s9/ |
| D | MAINTAINERS | 1 Bitmain Antminer S9
|
| /external/clang/test/CXX/class.access/class.friend/ |
| D | p11.cpp | 81 struct S9 { in foo() struct
|
| /external/clang/test/ASTMerge/Inputs/ |
| D | struct2.c | 39 struct S9 *x9;
|
| D | struct1.c | 42 struct S9 { int i; float f; } *x9; struct
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/ADT/ |
| D | StringSwitch.h | 149 StringLiteral S9, T Value) { in Cases() argument
150 return Case(S0, Value).Cases(S1, S2, S3, S4, S5, S6, S7, S8, S9, Value); in Cases()
|
| /external/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
| D | StringSwitch.h | 184 const char (&S8)[N8], const char (&S9)[N9], in Cases()
186 return Case(S0, Value).Cases(S1, S2, S3, S4, S5, S6, S7, S8, S9, Value); in Cases()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.td | 78 S9, S10, S11, S12, S13, S14, S15]>>,
97 S9, S10, S11, S12, S13, S14, S15]>>,
219 S9, S10, S11, S12, S13, S14, S15]>>,
237 S9, S10, S11, S12, S13, S14, S15]>>,
|
| D | ARMCallingConv.h | 167 ARM::S8, ARM::S9, ARM::S10, ARM::S11,
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.td | 78 S9, S10, S11, S12, S13, S14, S15]>>,
97 S9, S10, S11, S12, S13, S14, S15]>>,
218 S9, S10, S11, S12, S13, S14, S15]>>,
236 S9, S10, S11, S12, S13, S14, S15]>>,
|
| /external/llvm/test/TableGen/ |
| D | ForeachLoop.td | 64 // CHECK: def S9
|
| /external/clang/test/Misc/ |
| D | diag-template-diffing.cpp | 253 template<typename ...T> struct S9 {}; struct
254 template<typename T> using U9 = S9<int, char, T>;
256 int f9(S9<int, char, U9<const double>>);
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARC/Disassembler/ |
| D | ARCDisassembler.cpp | 162 unsigned S9 = Insn & 0x1ff; in DecodeMEMrs9() local
165 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9()
|
| /external/clang/test/SemaObjC/ |
| D | attr-designated-init.m | 224 @interface S9 : B1 interface
229 @interface S9(secondInit) interface in secondInit
233 @interface SS9 : S9
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 164 case R9: case S9: case D9: case Q9: return 9; in getARMRegisterNumbering()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenCallingConv.inc | 295 …ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10…
531 …ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10…
740 …ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10…
889 …ARM::S0, ARM::S1, ARM::S2, ARM::S3, ARM::S4, ARM::S5, ARM::S6, ARM::S7, ARM::S8, ARM::S9, ARM::S10…
|