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Searched refs:SAFE (Results 1 – 25 of 37) sorted by relevance

12

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Drecipest.ll2 …-mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck -check-prefix=CHECK-SAFE %s
28 ; CHECK-SAFE: @foo
29 ; CHECK-SAFE: fsqrt
30 ; CHECK-SAFE: fdiv
31 ; CHECK-SAFE: blr
63 ; CHECK-SAFE: @foof
64 ; CHECK-SAFE: fsqrts
65 ; CHECK-SAFE: fdiv
66 ; CHECK-SAFE: blr
88 ; CHECK-SAFE: @foo
[all …]
Dqpx-recipest.ll2 …einstrs < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2q | FileCheck -check-prefix=CHECK-SAFE %s
29 ; CHECK-SAFE-LABEL: @foo
30 ; CHECK-SAFE: fsqrt
31 ; CHECK-SAFE: fdiv
32 ; CHECK-SAFE: blr
53 ; CHECK-SAFE-LABEL: @foof
54 ; CHECK-SAFE: fsqrts
55 ; CHECK-SAFE: fdiv
56 ; CHECK-SAFE: blr
81 ; CHECK-SAFE-LABEL: @food
[all …]
Dfma-assoc.ll1 …vsx -disable-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SAFE %s
2 …able-ppc-vsx-fma-mutation=false | FileCheck -check-prefix=CHECK-VSX -check-prefix=CHECK-VSX-SAFE %s
13 ; CHECK-SAFE-LABEL: test_FMADD_ASSOC1:
14 ; CHECK-SAFE: fmul
15 ; CHECK-SAFE-NEXT: fmadd
16 ; CHECK-SAFE-NEXT: fadd
17 ; CHECK-SAFE-NEXT: blr
24 ; CHECK-VSX-SAFE-LABEL: test_FMADD_ASSOC1:
25 ; CHECK-VSX-SAFE: xsmuldp
26 ; CHECK-VSX-SAFE-NEXT: xsmaddadp
[all …]
Dchange-no-infs.ll6 ; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=SAFE
18 ; SAFE-NOT: fsel
28 ; SAFE-NOT: fsel
37 ; SAFE-NOT: fsel
47 ; SAFE-NOT: fsel
56 ; SAFE-NOT: fsel
/external/llvm/test/CodeGen/PowerPC/
Drecipest.ll3 …-mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr7 -mattr=-vsx | FileCheck -check-prefix=CHECK-SAFE %s
35 ; CHECK-SAFE: @foo
36 ; CHECK-SAFE: fsqrt
37 ; CHECK-SAFE: fdiv
38 ; CHECK-SAFE: blr
56 ; CHECK-SAFE: @foof
57 ; CHECK-SAFE: fsqrts
58 ; CHECK-SAFE: fdiv
59 ; CHECK-SAFE: blr
81 ; CHECK-SAFE: @foo
[all …]
Dqpx-recipest.ll2 ; RUN: llc < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=a2q | FileCheck -check-prefix=CHECK-SAFE…
29 ; CHECK-SAFE-LABEL: @foo
30 ; CHECK-SAFE: fsqrt
31 ; CHECK-SAFE: fdiv
32 ; CHECK-SAFE: blr
53 ; CHECK-SAFE-LABEL: @foof
54 ; CHECK-SAFE: fsqrts
55 ; CHECK-SAFE: fdiv
56 ; CHECK-SAFE: blr
81 ; CHECK-SAFE-LABEL: @food
[all …]
/external/llvm/test/CodeGen/X86/
Dsincos.ll4 …RUN: llc < %s -mtriple=i686-apple-macosx -mattr=-sse,-sse2,-sse3 | FileCheck %s --check-prefix=SAFE
21 ; SAFE: test1
22 ; SAFE-NOT: fsin
33 ; SAFE: test2
34 ; SAFE-NOT: fsin
60 ; SAFE: test4
61 ; SAFE-NOT: fcos
69 ; SAFE: test5
70 ; SAFE-NOT: fcos
Dfp-double-rounding.ll1 ; RUN: llc < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SAFE
8 ; SAFE: callq __trunctfdf2
9 ; SAFE-NEXT: cvtsd2ss %xmm0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Drsq.ll2 …tr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI %s
21 ; SI-SAFE: v_sqrt_f64_e32
55 ; SI-SAFE-NOT: v_rsq_f32
77 ; SI-SAFE: v_sqrt_f32_e32 [[SQRT:v[0-9]+]], v{{[0-9]+}}
78 ; SI-SAFE: v_rcp_f32_e64 [[RSQ:v[0-9]+]], -[[SQRT]]
79 ; SI-SAFE: buffer_store_dword [[RSQ]]
93 ; SI-SAFE: v_sqrt_f64_e32
94 ; SI-SAFE: v_div_scale_f64
108 ; SI-SAFE: v_sqrt_f32_e64 [[SQRT:v[0-9]+]], -v{{[0-9]+}}
109 ; SI-SAFE: v_rcp_f32_e64 [[RSQ:v[0-9]+]], -[[SQRT]]
[all …]
Dfract.ll1 …e -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE -check-prefix=GCN -…
2 …cn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE -check-prefix=GCN -…
3 …-flat-for-global -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE -check-prefix=GCN -…
11 ; GCN-SAFE: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
12 ; GCN-SAFE: v_sub_f32_e32 [[RESULT:v[0-9]+]], [[INPUT]], [[FLR]]
26 ; GCN-SAFE: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
27 ; GCN-SAFE: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
42 ; GCN-SAFE: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
43 ; GCN-SAFE: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
Dcvt_rpi_i32_f32.ll1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix…
3 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check…
9 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32
21 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32
37 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
51 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32
55 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
Dfmin_legacy.ll1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix…
15 ; SI-SAFE: v_min_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
32 ; SI-SAFE: v_min_legacy_f32_e64 {{v[0-9]+}}, [[VB]], s[[A]]
45 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
64 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
83 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
102 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
121 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
140 ; SI-SAFE: v_min_legacy_f32_e32
141 ; SI-SAFE: v_min_legacy_f32_e32
[all …]
Dfmin_fmax_legacy.amdgcn.ll1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE -check-prefi…
7 ; GCN-SAFE: v_max_legacy_f32_e64 [[MIN:v[0-9]+]], -1.0, -v0
17 ; GCN-SAFE: v_max_legacy_f32_e64 [[MIN:v[0-9]+]], 1.0, -v0
27 ; GCN-SAFE: v_min_legacy_f32_e64 [[MIN:v[0-9]+]], -1.0, -v0
37 ; GCN-SAFE: v_min_legacy_f32_e64 [[MIN:v[0-9]+]], 1.0, -v0
Dcvt_flr_i32_f32.ll1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix…
9 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
22 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
35 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
48 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
61 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
Dfmax_legacy.ll1 … -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC …
12 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
33 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
53 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
73 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
93 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
111 ; SI-SAFE: v_max_legacy_f32_e32
112 ; SI-SAFE: v_max_legacy_f32_e32
113 ; SI-SAFE: v_max_legacy_f32_e32
/external/llvm/test/CodeGen/AMDGPU/
Dfract.ll1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE -check-prefi…
2 …cn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE -check-prefix=GCN -…
3 ; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GCN-SAFE …
11 ; GCN-SAFE: v_floor_f32_e32 [[FLR:v[0-9]+]], [[INPUT:v[0-9]+]]
12 ; GCN-SAFE: v_subrev_f32_e32 [[RESULT:v[0-9]+]], [[FLR]], [[INPUT]]
26 ; GCN-SAFE: v_floor_f32_e64 [[FLR:v[0-9]+]], -[[INPUT:v[0-9]+]]
27 ; GCN-SAFE: v_sub_f32_e64 [[RESULT:v[0-9]+]], -[[INPUT]], [[FLR]]
42 ; GCN-SAFE: v_floor_f32_e64 [[FLR:v[0-9]+]], -|[[INPUT:v[0-9]+]]|
43 ; GCN-SAFE: v_sub_f32_e64 [[RESULT:v[0-9]+]], -|[[INPUT]]|, [[FLR]]
Dcvt_rpi_i32_f32.ll1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -che…
3 ; RUN: llc -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI -check…
9 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32
21 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32
37 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
51 ; SI-SAFE-NOT: v_cvt_rpi_i32_f32
55 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
Dfmin_legacy.ll1 ; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix…
15 ; SI-SAFE: v_min_legacy_f32_e32 v{{[0-9]+}}, s{{[0-9]+}}, v{{[0-9]+}}
31 ; SI-SAFE-DAG: v_mov_b32_e32 [[VA:v[0-9]+]], [[A]]
34 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[VA]]
47 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
66 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
85 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
104 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
123 ; SI-SAFE: v_min_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
142 ; SI-SAFE: v_min_legacy_f32_e32
[all …]
Dcvt_flr_i32_f32.ll1 ; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -che…
9 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
22 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
35 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
48 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
61 ; SI-SAFE-NOT: v_cvt_flr_i32_f32
Dfmax_legacy.ll1 … -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=SI-SAFE -check-prefix=FUNC …
12 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
33 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
53 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[B]], [[A]]
73 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
93 ; SI-SAFE: v_max_legacy_f32_e32 {{v[0-9]+}}, [[A]], [[B]]
111 ; SI-SAFE: v_max_legacy_f32_e32
112 ; SI-SAFE: v_max_legacy_f32_e32
113 ; SI-SAFE: v_max_legacy_f32_e32
Drsq.ll2 …tr=-fp32-denormals -verify-machineinstrs < %s | FileCheck -check-prefix=SI-SAFE -check-prefix=SI %s
21 ; SI-SAFE: v_sqrt_f64_e32
55 ; SI-SAFE-NOT: v_rsq_f32
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/X86/
Dchange-unsafe-fp-math.ll5 ; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=SAFE
15 ; SAFE: divsd
23 ; SAFE: divsd
32 ; SAFE: divsd
40 ; SAFE: mulsd
49 ; SAFE: divsd
Dfp-double-rounding.ll1 ; RUN: llc < %s | FileCheck %s --check-prefix=CHECK --check-prefix=SAFE
8 ; SAFE: callq __trunctfdf2
9 ; SAFE-NEXT: cvtsd2ss %xmm0
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/
Dunsafe-fsub.ll1 ; RUN: llc -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s
6 ; SAFE: test
10 ; SAFE: vmul.f32
11 ; SAFE: vsub.f32
/external/llvm/test/CodeGen/ARM/
Dunsafe-fsub.ll1 ; RUN: llc -march=arm -mcpu=cortex-a9 < %s | FileCheck -check-prefix=SAFE %s
6 ; SAFE: test
10 ; SAFE: vmul.f32
11 ; SAFE: vsub.f32

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