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Searched refs:SCG_CCR_DIVCORE_SHIFT (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dscg.h19 #define SCG_CCR_DIVCORE_SHIFT (16) macro
20 #define SCG_CCR_DIVCORE_MASK ((0xFUL) << SCG_CCR_DIVCORE_SHIFT)
/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dscg.c457 val = (reg & SCG_CCR_DIVCORE_MASK) >> SCG_CCR_DIVCORE_SHIFT; in scg_sys_get_rate()
799 #define SCG1_RCCR_DIVCORE_NUM ((0x0) << SCG_CCR_DIVCORE_SHIFT)