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Searched refs:SCG_SOSC_CSR_SOSCVLD_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx7ulp/
Dscg.c23 if (!(reg & SCG_SOSC_CSR_SOSCVLD_MASK)) in scg_src_get_rate()
151 if (!(reg & SCG_SOSC_CSR_SOSCVLD_MASK)) in scg_soscdiv_get_rate()
1052 while (!(readl(&scg1_regs->sosccsr) & SCG_SOSC_CSR_SOSCVLD_MASK)) in scg_a7_soscdiv_init()
/external/u-boot/arch/arm/include/asm/arch-mx7ulp/
Dscg.h124 #define SCG_SOSC_CSR_SOSCVLD_MASK ((0x1UL) << SCG_SOSC_CSR_SOSCVLD_SHIFT) macro