Searched refs:SCIdx (Results 1 – 11 of 11) sorted by relevance
/external/llvm/utils/TableGen/ |
D | CodeGenSchedule.cpp | 516 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, ProcIndices); in collectSchedClasses() local 517 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses() 534 unsigned SCIdx = InstrClassMap.lookup(Inst->TheDef); in collectSchedClasses() local 535 if (!SCIdx) { in collectSchedClasses() 540 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses() 560 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses() 687 unsigned SCIdx = Pos->second; in createInstRWClass() local 690 if (ClassInstrs[CIdx].first == SCIdx) in createInstRWClass() 695 ClassInstrs[CIdx].first = SCIdx; in createInstRWClass() 728 unsigned SCIdx = SchedClasses.size(); in createInstRWClass() local [all …]
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D | SubtargetEmitter.cpp | 1126 for (unsigned SCIdx = 1, SCEnd = SCTab.size(); SCIdx != SCEnd; ++SCIdx) { in EmitSchedClassTables() local 1127 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables() 1128 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables() 1141 if (SCIdx + 1 < SCEnd) in EmitSchedClassTables() 1143 OS << " // #" << SCIdx << '\n'; in EmitSchedClassTables()
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D | CodeGenSchedule.h | 420 void inferFromInstRWs(unsigned SCIdx);
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | CodeGenSchedule.cpp | 617 unsigned SCIdx = addSchedClass(ItinDef, Writes, Reads, /*ProcIndices*/{0}); in collectSchedClasses() local 618 InstrClassMap[Inst->TheDef] = SCIdx; in collectSchedClasses() 639 unsigned SCIdx = getSchedClassIdx(*Inst); in collectSchedClasses() local 640 if (!SCIdx) { in collectSchedClasses() 647 CodeGenSchedClass &SC = getSchedClass(SCIdx); in collectSchedClasses() 670 const RecVec &RWDefs = SchedClasses[SCIdx].InstRWs; in collectSchedClasses() 793 unsigned SCIdx = Pos->second; in createInstRWClass() local 794 ClassInstrs[SCIdx].push_back(InstDef); in createInstRWClass() 835 unsigned SCIdx = SchedClasses.size(); in createInstRWClass() local 836 SchedClasses.emplace_back(SCIdx, createSchedClassName(InstDefs), nullptr); in createInstRWClass() [all …]
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D | SubtargetEmitter.cpp | 1323 for (unsigned SCIdx = 1, SCEnd = SCTab.size(); SCIdx != SCEnd; ++SCIdx) { in EmitSchedClassTables() local 1324 MCSchedClassDesc &MCDesc = SCTab[SCIdx]; in EmitSchedClassTables() 1325 const CodeGenSchedClass &SchedClass = SchedModels.getSchedClass(SCIdx); in EmitSchedClassTables() 1338 << "}, // #" << SCIdx << '\n'; in EmitSchedClassTables()
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D | CodeGenSchedule.h | 473 void inferFromInstRWs(unsigned SCIdx);
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/external/llvm/lib/Target/AArch64/ |
D | AArch64StorePairSuppress.cpp | 81 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock() local 83 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64StorePairSuppress.cpp | 86 unsigned SCIdx = TII->get(AArch64::STPDi).getSchedClass(); in shouldAddSTPToBlock() local 88 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
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D | AArch64SIMDInstrOpt.cpp | 228 unsigned SCIdx = InstDesc->getSchedClass(); in shouldReplaceInst() local 230 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst()
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/external/llvm/lib/CodeGen/ |
D | TargetSchedule.cpp | 241 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency() local 242 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SCIdx); in computeInstrLatency()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | TargetSchedule.cpp | 263 unsigned SCIdx = TII->get(Opcode).getSchedClass(); in computeInstrLatency() local 264 return capLatency(SchedModel.computeInstrLatency(*STI, SCIdx)); in computeInstrLatency()
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