Searched refs:SCTLR_EL1 (Results 1 – 11 of 11) sorted by relevance
/external/linux-kselftest/tools/testing/selftests/kvm/include/aarch64/ |
D | processor.h | 20 #define SCTLR_EL1 3, 0, 1, 0, 0 macro
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/external/linux-kselftest/tools/testing/selftests/kvm/lib/aarch64/ |
D | processor.c | 266 get_reg(vm, vcpuid, ARM64_SYS_REG(SCTLR_EL1), &sctlr_el1); in vcpu_setup() 295 set_reg(vm, vcpuid, ARM64_SYS_REG(SCTLR_EL1), sctlr_el1); in vcpu_setup()
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/ |
D | arm64-system-encoding.s | 112 msr SCTLR_EL1, x3 192 ; CHECK: msr SCTLR_EL1, x3 ; encoding: [0x03,0x10,0x18,0xd5] 298 mrs x3, SCTLR_EL1 484 ; CHECK: mrs x3, SCTLR_EL1 ; encoding: [0x03,0x10,0x38,0xd5]
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D | basic-a64-instructions.s | 3767 msr SCTLR_EL1, x12 4315 mrs x9, SCTLR_EL1
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/external/llvm/test/MC/AArch64/ |
D | arm64-system-encoding.s | 111 msr SCTLR_EL1, x3 191 ; CHECK: msr SCTLR_EL1, x3 ; encoding: [0x03,0x10,0x18,0xd5] 296 mrs x3, SCTLR_EL1 481 ; CHECK: mrs x3, SCTLR_EL1 ; encoding: [0x03,0x10,0x38,0xd5]
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D | basic-a64-instructions.s | 3784 msr SCTLR_EL1, x12 4332 mrs x9, SCTLR_EL1
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenSystemOperands.inc | 347 SCTLR_EL1 = 49280, 2174 { "SCTLR_EL1", 0xC080, true, true, {} }, // 192 3197 { "SCTLR_EL1", 192 },
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/external/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 536 def : RWSysReg<"SCTLR_EL1", 0b11, 0b000, 0b0001, 0b0000, 0b000>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64SystemOperands.td | 706 def : RWSysReg<"SCTLR_EL1", 0b11, 0b000, 0b0001, 0b0000, 0b000>;
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 3257 # CHECK: msr {{sctlr_el1|SCTLR_EL1}}, x12 3549 # CHECK: mrs x9, {{sctlr_el1|SCTLR_EL1}}
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/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/ |
D | basic-a64-instructions.txt | 3241 # CHECK: msr {{sctlr_el1|SCTLR_EL1}}, x12 3534 # CHECK: mrs x9, {{sctlr_el1|SCTLR_EL1}}
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