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Searched refs:SC_CLKCTRL (Results 1 – 13 of 13) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/clk/
Dclk-early-ld4.c26 tmp = readl(SC_CLKCTRL); in uniphier_ld4_early_clk_init()
28 writel(tmp, SC_CLKCTRL); in uniphier_ld4_early_clk_init()
29 readl(SC_CLKCTRL); /* dummy read */ in uniphier_ld4_early_clk_init()
Dclk-dram-ld4.c25 tmp = readl(SC_CLKCTRL); in uniphier_ld4_dram_clk_init()
27 writel(tmp, SC_CLKCTRL); in uniphier_ld4_dram_clk_init()
28 readl(SC_CLKCTRL); /* dummy read */ in uniphier_ld4_dram_clk_init()
Dclk-ld4.c26 tmp = readl(SC_CLKCTRL); in uniphier_ld4_clk_init()
33 writel(tmp, SC_CLKCTRL); in uniphier_ld4_clk_init()
34 readl(SC_CLKCTRL); /* dummy read */ in uniphier_ld4_clk_init()
Dclk-pro5.c34 tmp = readl(SC_CLKCTRL); in uniphier_pro5_clk_init()
42 writel(tmp, SC_CLKCTRL); in uniphier_pro5_clk_init()
43 readl(SC_CLKCTRL); /* dummy read */ in uniphier_pro5_clk_init()
Dclk-pro4.c37 tmp = readl(SC_CLKCTRL); in uniphier_pro4_clk_init()
48 writel(tmp, SC_CLKCTRL); in uniphier_pro4_clk_init()
49 readl(SC_CLKCTRL); /* dummy read */ in uniphier_pro4_clk_init()
Dclk-pxs2.c39 tmp = readl(SC_CLKCTRL); in uniphier_pxs2_clk_init()
47 writel(tmp, SC_CLKCTRL); in uniphier_pxs2_clk_init()
48 readl(SC_CLKCTRL); /* dummy read */ in uniphier_pxs2_clk_init()
/external/u-boot/arch/arm/mach-uniphier/arm32/
Ddebug_ll.S56 ldr r0, =SC_CLKCTRL
97 ldr r0, =SC_CLKCTRL
122 ldr r0, =SC_CLKCTRL
146 ldr r0, =SC_CLKCTRL
/external/u-boot/arch/arm/mach-uniphier/debug-uart/
Ddebug-uart-ld6b.c25 tmp = readl(SC_CLKCTRL); in uniphier_ld6b_debug_uart_init()
27 writel(tmp, SC_CLKCTRL); in uniphier_ld6b_debug_uart_init()
Ddebug-uart-pro4.c25 tmp = readl(SC_CLKCTRL); in uniphier_pro4_debug_uart_init()
27 writel(tmp, SC_CLKCTRL); in uniphier_pro4_debug_uart_init()
Ddebug-uart-pxs2.c26 tmp = readl(SC_CLKCTRL); in uniphier_pxs2_debug_uart_init()
28 writel(tmp, SC_CLKCTRL); in uniphier_pxs2_debug_uart_init()
Ddebug-uart-pro5.c28 tmp = readl(SC_CLKCTRL); in uniphier_pro5_debug_uart_init()
30 writel(tmp, SC_CLKCTRL); in uniphier_pro5_debug_uart_init()
/external/u-boot/arch/arm/mach-uniphier/
Dsc64-regs.h21 #define SC_CLKCTRL (SC_BASE_ADDR | 0x2100) macro
Dsc-regs.h72 #define SC_CLKCTRL (SC_BASE_ADDR | 0x2104) macro