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Searched refs:SC_RSTCTRL2 (Results 1 – 4 of 4) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/clk/
Dclk-pro5.c27 tmp = readl(SC_RSTCTRL2); in uniphier_pro5_clk_init()
29 writel(tmp, SC_RSTCTRL2); in uniphier_pro5_clk_init()
30 readl(SC_RSTCTRL2); /* dummy read */ in uniphier_pro5_clk_init()
Dclk-pro4.c30 tmp = readl(SC_RSTCTRL2); in uniphier_pro4_clk_init()
32 writel(tmp, SC_RSTCTRL2); in uniphier_pro4_clk_init()
33 readl(SC_RSTCTRL2); /* dummy read */ in uniphier_pro4_clk_init()
Dclk-pxs2.c28 tmp = readl(SC_RSTCTRL2); in uniphier_pxs2_clk_init()
30 writel(tmp, SC_RSTCTRL2); in uniphier_pxs2_clk_init()
31 readl(SC_RSTCTRL2); /* dummy read */ in uniphier_pxs2_clk_init()
/external/u-boot/arch/arm/mach-uniphier/
Dsc-regs.h52 #define SC_RSTCTRL2 (SC_BASE_ADDR | 0x2004) macro