Home
last modified time | relevance | path

Searched refs:SC_VPLL27BCTRL2 (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/clk/
Dpll-ld4.c82 tmp = readl(SC_VPLL27BCTRL2); in vpll_init()
84 writel(tmp, SC_VPLL27BCTRL2); in vpll_init()
91 tmp = readl(SC_VPLL27BCTRL2); in vpll_init()
94 writel(tmp, SC_VPLL27BCTRL2); in vpll_init()
134 tmp = readl(SC_VPLL27BCTRL2); in vpll_init()
136 writel(tmp, SC_VPLL27BCTRL2); in vpll_init()
Dpll-pro4.c49 tmp = readl(SC_VPLL27BCTRL2); in vpll_init()
52 writel(tmp, SC_VPLL27BCTRL2); in vpll_init()
92 tmp = readl(SC_VPLL27BCTRL2); in vpll_init()
94 writel(tmp, SC_VPLL27BCTRL2); in vpll_init()
/external/u-boot/arch/arm/mach-uniphier/
Dsc-regs.h38 #define SC_VPLL27BCTRL2 (SC_BASE_ADDR | 0x1294) macro