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Searched refs:SD0_ITAPCHGWIN_MASK (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/board/xilinx/zynqmp/
Dtap_delays.c18 #define SD0_ITAPCHGWIN_MASK 0x00000200 macro
109 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, in arasan_zynqmp_tap_hs()
115 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); in arasan_zynqmp_tap_hs()
146 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, in arasan_zynqmp_tap_ddr50()
156 zynqmp_mmio_write(SD_ITAP_DLY, SD0_ITAPCHGWIN_MASK, 0x0); in arasan_zynqmp_tap_ddr50()