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Searched refs:SD0_ITAPDLYSEL_MMC_DDR50 (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/board/xilinx/zynqmp/
Dtap_delays.c29 #define SD0_ITAPDLYSEL_MMC_DDR50 0x00000012 macro
155 SD0_ITAPDLYSEL_MMC_DDR50); in arasan_zynqmp_tap_ddr50()