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Searched refs:SDCDIV (Results 1 – 1 of 1) sorted by relevance

/external/u-boot/drivers/mmc/
Dbcm2835_sdhost.c51 #define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ macro
188 dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()
211 writel(0, host->ioaddr + SDCDIV); in bcm2835_reset_internal()
232 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_reset_internal()
622 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()
645 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()