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Searched refs:SDMMC2 (Results 1 – 8 of 8) sorted by relevance

/external/u-boot/arch/arm/mach-tegra/tegra30/
Dpinmux.c99 PIN(VI_D1_PD5, DDR, SDMMC2, VI, RSVD4),
100 PIN(VI_D2_PL0, DDR, SDMMC2, VI, RSVD4),
101 PIN(VI_D3_PL1, DDR, SDMMC2, VI, RSVD4),
102 PIN(VI_D4_PL2, DDR, SDMMC2, VI, RSVD4),
103 PIN(VI_D5_PL3, DDR, SDMMC2, VI, RSVD4),
104 PIN(VI_D6_PL4, DDR, SDMMC2, VI, RSVD4),
105 PIN(VI_D7_PL5, DDR, SDMMC2, VI, RSVD4),
106 PIN(VI_D8_PL6, DDR, SDMMC2, VI, RSVD4),
107 PIN(VI_D9_PL7, DDR, SDMMC2, VI, RSVD4),
110 PIN(VI_PCLK_PT0, RSVD1, SDMMC2, VI, RSVD4),
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra124/
Dpinmux.c141 PIN(PI5, SDMMC2, RSVD2, GMI, RSVD4),
144 PIN(PK1, SDMMC2, TRACE, GMI, RSVD4),
147 PIN(PK3, SDMMC2, TRACE, GMI, CCLA),
148 PIN(PK4, SDMMC2, RSVD2, GMI, GMI_ALT),
151 PIN(PI6, RSVD1, RSVD2, GMI, SDMMC2),
164 PIN(PH4, SDMMC2, RSVD2, GMI, RSVD4),
165 PIN(PH5, SDMMC2, RSVD2, GMI, RSVD4),
166 PIN(PH6, SDMMC2, TRACE, GMI, DTV),
167 PIN(PH7, SDMMC2, TRACE, GMI, DTV),
174 PIN(PI2, SDMMC2, TRACE, GMI, RSVD4),
[all …]
/external/u-boot/arch/arm/mach-tegra/tegra114/
Dpinmux.c141 PIN(GMI_IORDY_PI5, SDMMC2, RSVD2, GMI, TRACE),
144 PIN(GMI_CLK_PK1, SDMMC2, NAND, GMI, TRACE),
147 PIN(GMI_CS2_N_PK3, SDMMC2, NAND, GMI, TRACE),
148 PIN(GMI_CS3_N_PK4, SDMMC2, NAND, GMI, GMI_ALT),
151 PIN(GMI_CS7_N_PI6, NAND, NAND_ALT, GMI, SDMMC2),
164 PIN(GMI_AD12_PH4, SDMMC2, NAND, GMI, RSVD4),
165 PIN(GMI_AD13_PH5, SDMMC2, NAND, GMI, RSVD4),
166 PIN(GMI_AD14_PH6, SDMMC2, NAND, GMI, DTV),
167 PIN(GMI_AD15_PH7, SDMMC2, NAND, GMI, DTV),
174 PIN(GMI_DQS_P_PJ3, SDMMC2, NAND, GMI, TRACE),
[all …]
/external/u-boot/board/toradex/colibri_t30/
Dpinmux-config-colibri_t30.h173 LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
174 LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
175 LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
177 LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
178 LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
237 DEFAULT_PINMUX(KB_ROW10_PS2, SDMMC2, NORMAL, NORMAL, INPUT),
238 DEFAULT_PINMUX(KB_ROW11_PS3, SDMMC2, UP, NORMAL, INPUT),
239 DEFAULT_PINMUX(KB_ROW12_PS4, SDMMC2, UP, NORMAL, INPUT),
240 DEFAULT_PINMUX(KB_ROW13_PS5, SDMMC2, UP, NORMAL, INPUT),
241 DEFAULT_PINMUX(KB_ROW14_PS6, SDMMC2, UP, NORMAL, INPUT),
[all …]
/external/u-boot/board/nvidia/cardhu/
Dpinmux-config-cardhu.h172 LV_PINMUX(VI_D1_PD5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
173 LV_PINMUX(VI_D2_PL0, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
174 LV_PINMUX(VI_D3_PL1, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
176 LV_PINMUX(VI_D5_PL3, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
177 LV_PINMUX(VI_D7_PL5, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
301 LV_PINMUX(VI_D8_PL6, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
302 LV_PINMUX(VI_D9_PL7, SDMMC2, NORMAL, NORMAL, INPUT, DISABLE, DISABLE),
/external/u-boot/board/toradex/apalis_t30/
Dpinmux-config-apalis_t30.h246 DEFAULT_PINMUX(KB_ROW10_PS2, SDMMC2, NORMAL, NORMAL, INPUT),
247 DEFAULT_PINMUX(KB_ROW11_PS3, SDMMC2, NORMAL, NORMAL, INPUT),
248 DEFAULT_PINMUX(KB_ROW12_PS4, SDMMC2, NORMAL, NORMAL, INPUT),
249 DEFAULT_PINMUX(KB_ROW13_PS5, SDMMC2, NORMAL, NORMAL, INPUT),
250 DEFAULT_PINMUX(KB_ROW14_PS6, SDMMC2, NORMAL, NORMAL, INPUT),
251 DEFAULT_PINMUX(KB_ROW15_PS7, SDMMC2, NORMAL, NORMAL, INPUT),
/external/u-boot/include/dt-bindings/clock/
Dstm32mp1-clks.h119 #define SDMMC2 110 macro
/external/u-boot/drivers/clk/
Dclk_stm32f.c451 case STM32F7_APB2_CLOCK(SDMMC2): in stm32_clk_get_rate()