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Searched refs:SDTCisVT (Results 1 – 25 of 92) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/
DSystemZOperators.td13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>,
14 SDTCisVT<1, i64>]>;
15 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
16 SDTCisVT<1, i64>]>;
19 [SDTCisVT<0, i32>,
22 [SDTCisVT<0, i32>,
24 SDTCisVT<3, i32>]>;
26 [SDTCisVT<0, i32>,
27 SDTCisVT<1, i32>,
28 SDTCisVT<2, OtherVT>,
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td54 [SDTCisVT<0, i64>, SDTCisVT<1, i1>, SDTCisVT<2, OtherVT>]
58 [SDTCisVT<0, i64>, SDTCisVT<1, i64>, SDTCisVT<2, OtherVT>]
62 [SDTCisVT<0, i64>, SDTCisVT<1, OtherVT>]
66 [SDTCisVT<0, i64>, SDTCisVT<1, i64>]
70 [SDTCisVT<0, i64>, SDTCisVT<1, i1>, SDTCisVT<2, i64>]
74 [SDTCisVT<0, i64>, SDTCisVT<1, i64>, SDTCisVT<2, i64>]
78 [SDTCisSameAs<0, 2>, SDTCisSameAs<0, 3>, SDTCisVT<0, i32>, SDTCisVT<1, i1>, SDTCisVT<4, i1>]
92 SDCallSeqStart<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
97 SDCallSeqEnd<[ SDTCisVT<0, i32>, SDTCisVT<1, i32> ]>,
112 SDTypeProfile<0, -1, [SDTCisVT<0, i16>]>,
[all …]
DSIInstrInfo.td44 SDTypeProfile<1, 2, [SDTCisVT<0, f32>, SDTCisVT<1, v4i32>, SDTCisVT<2, i32>]>,
74 SDTCisVT<1, v4i32>, // rsrc
75 SDTCisVT<2, i32>, // vindex(VGPR)
76 SDTCisVT<3, i32>, // voffset(VGPR)
77 SDTCisVT<4, i32>, // soffset(SGPR)
78 SDTCisVT<5, i32>, // offset(imm)
79 SDTCisVT<6, i32>, // dfmt(imm)
80 SDTCisVT<7, i32>, // nfmt(imm)
81 SDTCisVT<8, i32>, // glc(imm)
82 SDTCisVT<9, i32> // slc(imm)
[all …]
/external/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
39 SDTCisFP<1>, SDTCisVT<3, i8>,
41 def SDTX86CmpTestSae : SDTypeProfile<1, 3, [SDTCisVT<0, i32>,
75 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
76 SDTCisVT<1, v4i32>]>>;
78 SDTypeProfile<1, 1, [SDTCisVT<0, v2f64>,
79 SDTCisVT<1, v4i32>]>>;
100 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,
103 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,
[all …]
DX86InstrInfo.td24 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<1, 2>]>;
26 def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
27 //def SDTX86Cmpss : SDTypeProfile<1, 3, [SDTCisVT<0, f32>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
31 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
36 SDTCisInt<0>, SDTCisVT<1, i32>]>;
41 SDTCisInt<0>, SDTCisVT<1, i32>]>;
48 SDTCisVT<1, i32>,
49 SDTCisVT<4, i32>]>;
55 SDTCisInt<0>, SDTCisVT<1, i32>]>;
57 [SDTCisVT<0, OtherVT>,
[all …]
/external/llvm/lib/Target/SystemZ/
DSystemZOperators.td13 def SDT_CallSeqStart : SDCallSeqStart<[SDTCisVT<0, i64>]>;
14 def SDT_CallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i64>,
15 SDTCisVT<1, i64>]>;
20 SDTCisVT<2, i32>]>;
22 [SDTCisVT<0, i32>,
23 SDTCisVT<1, i32>,
24 SDTCisVT<2, OtherVT>]>;
28 SDTCisVT<3, i32>,
29 SDTCisVT<4, i32>]>;
37 def SDT_ZAdjDynAlloc : SDTypeProfile<1, 0, [SDTCisVT<0, i64>]>;
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrFragmentsSIMD.td20 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
37 SDTCisVT<3, i8>]>;
86 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v16i8>,
89 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisVT<1, v8i16>,
92 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
93 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
95 SDTypeProfile<1, 3, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
96 SDTCisVT<2, i32>, SDTCisPtrTy<3>]>>;
98 SDTypeProfile<1, 3, [SDTCisVT<0, v4f32>, SDTCisSameAs<0,1>,
[all …]
DX86InstrInfo.td24 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<1, 2>]>;
26 def SDTX86Cmps : SDTypeProfile<1, 3, [SDTCisFP<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
27 //def SDTX86Cmpss : SDTypeProfile<1, 3, [SDTCisVT<0, f32>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
31 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
36 SDTCisInt<0>, SDTCisVT<1, i32>]>;
41 SDTCisInt<0>, SDTCisVT<1, i32>]>;
48 SDTCisVT<1, i32>,
49 SDTCisVT<4, i32>]>;
55 SDTCisInt<0>, SDTCisVT<1, i32>]>;
57 [SDTCisVT<0, OtherVT>,
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrFragmentsSIMD.td19 [SDTCisVT<0, i32>, SDTCisVT<1, x86mmx>]>>;
23 [SDTCisVT<0, x86mmx>, SDTCisVT<1, i32>]>>;
39 SDTCisFP<1>, SDTCisVT<3, i8>]>;
60 SDTypeProfile<1, 2, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
66 SDTypeProfile<1, 2, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
69 SDTypeProfile<1, 2, [SDTCisVT<0, v8i16>, SDTCisSameAs<0,1>,
72 SDTypeProfile<1, 2, [SDTCisVT<0, v4i32>, SDTCisSameAs<0,1>,
75 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
77 SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisPtrTy<2>]>>;
79 SDTypeProfile<1, 3, [SDTCisVT<0, v16i8>, SDTCisSameAs<0,1>,
[all …]
DX86InstrInfo.td24 def SDTX86CmpTest : SDTypeProfile<1, 2, [SDTCisVT<0, i32>, SDTCisSameAs<1, 2>]>;
26 def SDTX86Cmpsd : SDTypeProfile<1, 3, [SDTCisVT<0, f64>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
27 def SDTX86Cmpss : SDTypeProfile<1, 3, [SDTCisVT<0, f32>, SDTCisSameAs<1, 2>, SDTCisVT<3, i8>]>;
31 SDTCisVT<3, i8>, SDTCisVT<4, i32>]>;
35 [SDTCisInt<0>, SDTCisVT<1, i32>]>;
40 SDTCisInt<0>, SDTCisVT<1, i32>]>;
47 SDTCisVT<1, i32>,
48 SDTCisVT<4, i32>]>;
54 SDTCisInt<0>, SDTCisVT<1, i32>]>;
56 [SDTCisVT<0, OtherVT>,
[all …]
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td28 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>]>;
30 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
34 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInfo.td56 def SDT_WebAssemblyCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
57 SDTCisVT<1, iPTR>]>;
59 SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
63 def SDT_WebAssemblyArgument : SDTypeProfile<1, 1, [SDTCisVT<1, i32>]>;
/external/swiftshader/third_party/LLVM/lib/Target/Mips/
DMipsInstrFPU.td28 SDTCisVT<1, OtherVT>]>;
30 SDTCisVT<2, i32>]>;
33 def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
34 SDTCisVT<1, i32>,
36 def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
37 SDTCisVT<1, f64>,
38 SDTCisVT<2, i32>]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/
DBPFInstrInfo.td19 def SDT_BPFCallSeqStart : SDCallSeqStart<[SDTCisVT<0, iPTR>,
20 SDTCisVT<1, iPTR>]>;
21 def SDT_BPFCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
22 def SDT_BPFCall : SDTypeProfile<0, -1, [SDTCisVT<0, iPTR>]>;
28 SDTCisVT<3, OtherVT>]>;
31 def SDT_BPFMEMCPY : SDTypeProfile<0, 4, [SDTCisVT<0, i64>,
32 SDTCisVT<1, i64>,
33 SDTCisVT<2, i64>,
34 SDTCisVT<3, i64>]>;
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfoVector.td140 [SDTCisSameAs<0, 1>, SDTCisVT<0, v2i32>, SDTCisInt<2>]>;
142 [SDTCisSameAs<0, 1>, SDTCisVT<0, v4i16>, SDTCisInt<2>]>;
189 [SDTCisSameAs<1, 2>, SDTCisVT<0, i1>, SDTCisVT<1, v8i8>]>;
191 [SDTCisSameAs<1, 2>, SDTCisVT<0, i1>, SDTCisVT<1, v4i16>]>;
193 [SDTCisSameAs<1, 2>, SDTCisVT<0, i1>, SDTCisVT<1, v2i32>]>;
418 [SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>, SDTCisVT<0, i64>]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/RISCV/
DRISCVInstrInfoD.td19 def SDT_RISCVBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
20 SDTCisVT<1, i32>,
22 def SDT_RISCVSplitF64 : SDTypeProfile<2, 1, [SDTCisVT<0, i32>,
23 SDTCisVT<1, i32>,
24 SDTCisVT<2, f64>]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td25 def SDT_LanaiCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>,
26 SDTCisVT<1, i32>]>;
27 def SDT_LanaiCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>,
28 SDTCisVT<1, i32>]>;
29 def SDT_LanaiCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>;
33 def SDT_LanaiSetCC : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
34 SDTCisVT<1, i32>]>;
35 def SDT_LanaiBrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
36 SDTCisVT<1, i32>]>;
37 def SDT_LanaiAdjDynAlloc : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
[all …]
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td28 SDTCisVT<1, i32>,
29 SDTCisVT<2, OtherVT>]>;
31 SDTCisVT<2, i32>]>;
32 def SDT_MipsCMovFP : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisVT<2, i32>,
35 def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
36 SDTCisVT<1, i32>,
38 def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
39 SDTCisVT<1, f64>,
40 SDTCisVT<2, i32>]>;
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td26 // SDTCisVT - The specified operand has exactly this VT.
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
109 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
160 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
165 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
178 SDTCisVT<5, OtherVT>
182 SDTCisVT<0, OtherVT>
186 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
190 SDTCisInt<0>, SDTCisVT<1, OtherVT>
198 SDTCisVT<0, OtherVT>, SDTCisVT<1, OtherVT>
[all …]
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstrInfo.td48 "AMDGPUISD::CONST_DATA_PTR", SDTypeProfile <1, 1, [SDTCisVT<0, iPTR>,
49 SDTCisVT<0, iPTR>]>
253 SDTCisVT<0, OtherVT>
/external/llvm/lib/Target/Lanai/
DLanaiInstrInfo.td25 def SDT_LanaiCallSeqStart : SDCallSeqStart<[SDTCisVT<0, i32>]>;
26 def SDT_LanaiCallSeqEnd : SDCallSeqEnd<[SDTCisVT<0, i32>,
27 SDTCisVT<1, i32>]>;
28 def SDT_LanaiCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>;
32 def SDT_LanaiSetCC : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
33 SDTCisVT<1, i32>]>;
34 def SDT_LanaiBrCC : SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>,
35 SDTCisVT<1, i32>]>;
36 def SDT_LanaiAdjDynAlloc : SDTypeProfile<1, 1, [SDTCisVT<0, i32>,
37 SDTCisVT<1, i32>]>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsInstrFPU.td28 SDTCisVT<1, i32>,
29 SDTCisVT<2, OtherVT>]>;
31 SDTCisVT<2, i32>]>;
32 def SDT_MipsCMovFP : SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisVT<2, i32>,
35 def SDT_MipsBuildPairF64 : SDTypeProfile<1, 2, [SDTCisVT<0, f64>,
36 SDTCisVT<1, i32>,
38 def SDT_MipsExtractElementF64 : SDTypeProfile<1, 2, [SDTCisVT<0, i32>,
39 SDTCisVT<1, f64>,
40 SDTCisVT<2, i32>]>;
42 def SDT_MipsMTC1_D64 : SDTypeProfile<1, 1, [SDTCisVT<0, f64>,
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrInfo.td21 SDTCisVT<0, f64>, SDTCisPtrTy<1>
23 def SDT_PPCCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>;
24 def SDT_PPCCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>,
25 SDTCisVT<1, i32> ]>;
27 SDTCisVT<3, v16i8>, SDTCisSameAs<0, 1>, SDTCisSameAs<0, 2>
31 SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32>
35 SDTCisVT<0, i32>, SDTCisVT<2, OtherVT>
39 SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>
42 SDTCisVT<0, i32>, SDTCisPtrTy<1>, SDTCisVT<2, OtherVT>
53 SDTCisPtrTy<0>, SDTCisVT<1, i32>
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td26 // SDTCisVT - The specified operand has exactly this VT.
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
109 def SDTOther : SDTypeProfile<1, 0, [SDTCisVT<0, OtherVT>]>; // for 'vt'.
160 SDTCisSameAs<0, 1>, SDTCisInt<0>, SDTCisVT<2, OtherVT>,
169 SDTCisInt<0>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
182 SDTCisVT<5, OtherVT>
186 SDTCisVT<0, OtherVT>
190 SDTCisVT<0, OtherVT>, SDTCisSameAs<1, 2>, SDTCisVT<3, OtherVT>
194 SDTCisInt<0>, SDTCisVT<1, OtherVT>
202 SDTCisVT<0, OtherVT>, SDTCisVT<1, OtherVT>
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/
DSparcInstrInfo.td90 SDTypeProfile<0, 2, [SDTCisVT<0, OtherVT>, SDTCisVT<1, i32>]>;
92 SDTypeProfile<1, 3, [SDTCisSameAs<0, 1>, SDTCisSameAs<1, 2>, SDTCisVT<3, i32>]>;
94 SDTypeProfile<1, 1, [SDTCisVT<0, f32>, SDTCisFP<1>]>;
96 SDTypeProfile<1, 1, [SDTCisFP<0>, SDTCisVT<1, f32>]>;
113 def SDT_SPCallSeqStart : SDCallSeqStart<[ SDTCisVT<0, i32> ]>;
114 def SDT_SPCallSeqEnd : SDCallSeqEnd<[ SDTCisVT<0, i32>,
115 SDTCisVT<1, i32> ]>;
122 def SDT_SPCall : SDTypeProfile<0, -1, [SDTCisVT<0, i32>]>;
127 def SDT_SPRet : SDTypeProfile<0, 1, [SDTCisVT<0, i32>]>;

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