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Searched refs:SERDES_MUX_LANE_6_SHIFT (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/board/freescale/p2041rdb/
Dcpld.h33 #define SERDES_MUX_LANE_6_SHIFT 1 macro
Dcpld.c110 reg |= val << SERDES_MUX_LANE_6_SHIFT; in cpld_cmd()