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Searched refs:SETEQ (Results 1 – 25 of 117) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonSelectCCInfo.td15 IntRegs:$fval, SETEQ)),
77 // Convert Rd = selectcc(p0, p1, true_val, false_val, SETEQ) into:
88 IntRegs:$fval, SETEQ)),
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td43 defm EQ : ComparisonInt<SETEQ, "eq ">;
60 [(set I32:$dst, (setcc I32:$src, 0, SETEQ))],
63 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DAnalysis.cpp155 case FCmpInst::FCMP_OEQ: FOC = ISD::SETEQ; FPC = ISD::SETOEQ; break; in getFCmpCondCode()
163 case FCmpInst::FCMP_UEQ: FOC = ISD::SETEQ; FPC = ISD::SETUEQ; break; in getFCmpCondCode()
186 case ICmpInst::ICMP_EQ: return ISD::SETEQ; in getICmpCondCode()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td43 defm EQ : ComparisonInt<SETEQ, "eq ", 0x46, 0x51>;
60 [(set I32:$dst, (setcc I32:$src, 0, SETEQ))],
63 [(set I32:$dst, (setcc I64:$src, 0, SETEQ))],
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp525 CCs[RTLIB::OEQ_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
526 CCs[RTLIB::OEQ_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
539 CCs[RTLIB::O_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
540 CCs[RTLIB::O_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
1938 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1940 if ((C1 == 0) == (Cond == ISD::SETEQ)) { in SimplifySetCC()
1947 Cond = ISD::SETEQ; in SimplifySetCC()
1972 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
1981 (Cond == ISD::SETEQ || Cond == ISD::SETNE)) { in SimplifySetCC()
2084 case ISD::SETEQ: return DAG.getConstant(0, VT); in SimplifySetCC()
[all …]
/external/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp161 case ISD::SETEQ: in softenSetCCOperands()
1293 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in simplifySetCCWithAnd()
1382 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1384 if ((C1 == 0) == (Cond == ISD::SETEQ)) { in SimplifySetCC()
1391 Cond = ISD::SETEQ; in SimplifySetCC()
1416 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
1425 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1492 bool Inverse = (N1C->isNullValue() && Cond == ISD::SETEQ) || in SimplifySetCC()
1579 case ISD::SETEQ: return DAG.getConstant(0, dl, VT); in SimplifySetCC()
1598 case ISD::SETEQ: in SimplifySetCC()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp166 case ISD::SETEQ: in softenSetCCOperands()
1807 (Cond != ISD::SETEQ && Cond != ISD::SETNE)) in simplifySetCCWithAnd()
1890 NewCond = ISD::CondCode::SETEQ; in optimizeSetCCOfSignedTruncationCheck()
1892 NewCond = ISD::CondCode::SETEQ; in optimizeSetCCOfSignedTruncationCheck()
1974 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
1976 if ((C1 == 0) == (Cond == ISD::SETEQ)) { in SimplifySetCC()
1983 Cond = ISD::SETEQ; in SimplifySetCC()
2008 ISD::CondCode CC = Cond == ISD::SETULT ? ISD::SETEQ : ISD::SETNE; in SimplifySetCC()
2017 if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) && in SimplifySetCC()
2066 Cond == ISD::SETEQ ? ISD::SETNE : ISD::SETEQ); in SimplifySetCC()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp453 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
494 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
553 case ISD::SETEQ: return PPC::PRED_EQ; in getPredicateForSetCC()
588 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ in getCRIdxForSetCC()
624 case ISD::SETEQ: { in SelectSETCC()
653 case ISD::SETEQ: in SelectSETCC()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp497 CCs[RTLIB::OEQ_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
498 CCs[RTLIB::OEQ_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
499 CCs[RTLIB::OEQ_F128] = ISD::SETEQ; in InitCmpLibcallCCs()
500 CCs[RTLIB::OEQ_PPCF128] = ISD::SETEQ; in InitCmpLibcallCCs()
525 CCs[RTLIB::O_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
526 CCs[RTLIB::O_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
527 CCs[RTLIB::O_F128] = ISD::SETEQ; in InitCmpLibcallCCs()
528 CCs[RTLIB::O_PPCF128] = ISD::SETEQ; in InitCmpLibcallCCs()
DAnalysis.cpp185 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
200 case ICmpInst::ICMP_EQ: return ISD::SETEQ; in getICmpCondCode()
/external/llvm/lib/CodeGen/
DTargetLoweringBase.cpp763 CCs[RTLIB::OEQ_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
764 CCs[RTLIB::OEQ_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
765 CCs[RTLIB::OEQ_F128] = ISD::SETEQ; in InitCmpLibcallCCs()
766 CCs[RTLIB::OEQ_PPCF128] = ISD::SETEQ; in InitCmpLibcallCCs()
791 CCs[RTLIB::O_F32] = ISD::SETEQ; in InitCmpLibcallCCs()
792 CCs[RTLIB::O_F64] = ISD::SETEQ; in InitCmpLibcallCCs()
793 CCs[RTLIB::O_F128] = ISD::SETEQ; in InitCmpLibcallCCs()
794 CCs[RTLIB::O_PPCF128] = ISD::SETEQ; in InitCmpLibcallCCs()
DAnalysis.cpp186 case ISD::SETOEQ: case ISD::SETUEQ: return ISD::SETEQ; in getFCmpCodeWithoutNaN()
201 case ICmpInst::ICMP_EQ: return ISD::SETEQ; in getICmpCondCode()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h732 SETEQ, // 1 X 0 0 1 True if equal enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h870 SETEQ, // 1 X 0 0 1 True if equal enumerator
/external/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp970 case ISD::SETEQ: in CombineFMinMaxLegacy()
1374 SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, zero, REM_Part, LHS_Hi, ISD::SETEQ); in LowerUDIVREM64()
1378 SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, zero, DIV_Part, zero, ISD::SETEQ); in LowerUDIVREM64()
1448 ISD::SETEQ); in LowerUDIVREM()
1462 ISD::SETEQ); in LowerUDIVREM()
1499 Quotient, Quotient_A_One, ISD::SETEQ); in LowerUDIVREM()
1503 Quotient_S_One, Div, ISD::SETEQ); in LowerUDIVREM()
1515 Remainder, Remainder_S_Den, ISD::SETEQ); in LowerUDIVREM()
1519 Remainder_A_Den, Rem, ISD::SETEQ); in LowerUDIVREM()
1797 SDValue ExpEqNegOne = DAG.getSetCC(SL, SetCCVT, NegOne, Exp, ISD::SETEQ); in LowerFROUND64()
[all …]
DAMDGPUInstructions.td86 [{return N->get() == ISD::SETOEQ || N->get() == ISD::SETEQ;}]
151 [{return N->get() == ISD::SETEQ || N->get() == ISD::SETUEQ;}]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DAMDGPUISelLowering.cpp1267 case ISD::SETEQ: in combineFMinMaxLegacy()
1668 SDValue C3 = DAG.getSelectCC(DL, Sub1_Hi, RHS_Hi, C2, C1, ISD::SETEQ); in LowerUDIVREM64()
1690 SDValue C6 = DAG.getSelectCC(DL, Sub2_Hi, RHS_Hi, C5, C4, ISD::SETEQ); in LowerUDIVREM64()
1724 SDValue REM_Lo = DAG.getSelectCC(DL, RHS_Hi, Zero, REM_Part, LHS_Hi, ISD::SETEQ); in LowerUDIVREM64()
1728 SDValue DIV_Hi = DAG.getSelectCC(DL, RHS_Hi, Zero, DIV_Part, Zero, ISD::SETEQ); in LowerUDIVREM64()
1798 ISD::SETEQ); in LowerUDIVREM()
1812 ISD::SETEQ); in LowerUDIVREM()
1849 Quotient, Quotient_A_One, ISD::SETEQ); in LowerUDIVREM()
1853 Quotient_S_One, Div, ISD::SETEQ); in LowerUDIVREM()
1865 Remainder, Remainder_S_Den, ISD::SETEQ); in LowerUDIVREM()
[all …]
DSIInsertSkips.cpp195 case ISD::SETEQ: in kill()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h933 SETEQ, // 1 X 0 0 1 True if equal enumerator
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp1992 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
2036 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
2098 case ISD::SETEQ: return PPC::PRED_EQ; in getPredicateForSetCC()
2129 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ in getCRIdxForSetCC()
2170 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break; in getVCmpInst()
2178 case ISD::SETEQ: in getVCmpInst()
2214 case ISD::SETNE: CC = ISD::SETEQ; Negate = true; break; in getVCmpInst()
2222 case ISD::SETEQ: in getVCmpInst()
2277 case ISD::SETEQ: { in trySETCC()
2312 case ISD::SETEQ: in trySETCC()
[all …]
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenDAGISel.inc1401 /* 2515*/ OPC_CheckCondCode, ISD::SETEQ,
1414 …i64] }, (imm:{ *:[i64] })<<P:Predicate_immZExt5_64>>:$p)), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1447 /* 2593*/ OPC_CheckCondCode, ISD::SETEQ,
1460 …i64] }, (imm:{ *:[i64] })<<P:Predicate_immZExt5_64>>:$p)), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1498 /* 2676*/ OPC_CheckCondCode, ISD::SETEQ,
1511 …P:Predicate_immZExt5_64>>:$p), GPR64Opnd:{ *:[i64] }:$rs), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1545 /* 2755*/ OPC_CheckCondCode, ISD::SETEQ,
1558 …P:Predicate_immZExt5_64>>:$p), GPR64Opnd:{ *:[i64] }:$rs), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
1590 /* 2827*/ OPC_CheckCondCode, ISD::SETEQ,
1604 …:$lhs, (imm:{ *:[i64] })<<P:Predicate_PowerOf2LO>>:$mask), 0:{ *:[i64] }, SETEQ:{ *:[Other] }), (b…
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2745 case ISD::SETEQ: { in get32BitZExtCompare()
2919 case ISD::SETEQ: { in get32BitSExtCompare()
3090 case ISD::SETEQ: { in get64BitZExtCompare()
3247 case ISD::SETEQ: { in get64BitSExtCompare()
3530 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3574 if (CC == ISD::SETEQ || CC == ISD::SETNE) { in SelectCC()
3622 case ISD::SETEQ: in SelectCC()
3649 case ISD::SETEQ: in SelectCC()
3689 case ISD::SETEQ: return PPC::PRED_EQ; in getPredicateForSetCC()
3720 case ISD::SETEQ: return 2; // Bit #2 = SETOEQ in getCRIdxForSetCC()
[all …]
DPPCInstrInfo.td3258 def : Pat<(i1 (setcc i1:$s1, i1:$s2, SETEQ)),
3356 defm : ExtSetCCPat<SETEQ,
3466 defm : ExtSetCCShiftPat<SETEQ,
3485 def : Pat<(i1 (setcc i32:$s1, imm32SExt16:$imm, SETEQ)),
3487 def : Pat<(i1 (setcc i32:$s1, immZExt16:$imm, SETEQ)),
3501 def : Pat<(i1 (setcc i32:$s1, imm:$imm, SETEQ)),
3530 def : Pat<(i1 (setcc i32:$s1, i32:$s2, SETEQ)),
3553 def : Pat<(i1 (setcc i64:$s1, imm64SExt16:$imm, SETEQ)),
3555 def : Pat<(i1 (setcc i64:$s1, immZExt16:$imm, SETEQ)),
3569 def : Pat<(i1 (setcc i64:$s1, imm64ZExt32:$imm, SETEQ)),
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXISelLowering.cpp161 (CC == ISD::SETEQ || CC == ISD::SETNE)) { in LowerSETCC()
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaISelDAGToDAG.cpp311 case ISD::SETEQ: case ISD::SETOEQ: case ISD::SETUEQ: in Select()

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