/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/ |
D | unsupported-cc.ll | 30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x 44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}} 117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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D | llvm.round.ll | 21 ; R600-DAG: SETGE
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D | setcc.ll | 149 ; R600: SETGE 176 ; R600: SETGE
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/external/llvm/test/CodeGen/AMDGPU/ |
D | unsupported-cc.ll | 30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x 44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}} 117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
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D | llvm.round.ll | 20 ; R600-DAG: SETGE
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D | setcc.ll | 143 ; R600: SETGE 170 ; R600: SETGE
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | Analysis.cpp | 157 case FCmpInst::FCMP_OGE: FOC = ISD::SETGE; FPC = ISD::SETOGE; break; in getFCmpCondCode() 165 case FCmpInst::FCMP_UGE: FOC = ISD::SETGE; FPC = ISD::SETUGE; break; in getFCmpCondCode() 190 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 734 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator 746 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 872 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator 884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 935 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator 947 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 191 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN() 205 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
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D | TargetLoweringBase.cpp | 771 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs() 772 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs() 773 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs() 774 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | Analysis.cpp | 190 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN() 204 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
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D | TargetLoweringBase.cpp | 505 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs() 506 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs() 507 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs() 508 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonSelectCCInfo.td | 63 IntRegs:$fval, SETGE)),
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrInteger.td | 51 defm GE_S : ComparisonInt<SETGE, "ge_s">;
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86InstrCMovSetCC.td | 101 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrInteger.td | 52 defm GE_S : ComparisonInt<SETGE, "ge_s", 0x4e, 0x59>;
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/external/llvm/lib/Target/X86/ |
D | X86InstrCMovSetCC.td | 109 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86InstrCMovSetCC.td | 107 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 203 case ISD::SETGE: in kill()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
D | BPFISelLowering.cpp | 686 case ISD::SETGE: in EmitInstrWithCustomInserter() 716 CC == ISD::SETGE || in EmitInstrWithCustomInserter()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | TargetLowering.cpp | 529 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs() 530 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs() 2089 case ISD::SETGE: in SimplifySetCC() 2239 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { in SimplifySetCC() 2244 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); in SimplifySetCC() 2257 if ((Cond == ISD::SETGE || Cond == ISD::SETUGE) && C1 == MinVal) in SimplifySetCC() 2561 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRISelLowering.cpp | 422 case ISD::SETGE: in intCCToAVRCC() 448 CC = ISD::SETGE; in getAVRCmp() 473 CC = ISD::SETGE; in getAVRCmp() 492 CC = ISD::SETGE; in getAVRCmp()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 101 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}] 141 def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;
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