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Searched refs:SETGE (Results 1 – 25 of 111) sorted by relevance

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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/AMDGPU/
Dunsupported-cc.ll30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
Dllvm.round.ll21 ; R600-DAG: SETGE
Dsetcc.ll149 ; R600: SETGE
176 ; R600: SETGE
/external/llvm/test/CodeGen/AMDGPU/
Dunsupported-cc.ll30 ; CHECK: SETGE * T{{[0-9]}}.[[CHAN:[XYZW]]], KC0[2].Z, literal.x
44 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, KC0[2].Z, {{literal\.[xy]}}
117 ; CHECK-NEXT: SETGE {{\*? *}}T{{[0-9]\.[XYZW]}}, {{literal\.[xy]}}, KC0[2].Z
Dllvm.round.ll20 ; R600-DAG: SETGE
Dsetcc.ll143 ; R600: SETGE
170 ; R600: SETGE
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DAnalysis.cpp157 case FCmpInst::FCMP_OGE: FOC = ISD::SETGE; FPC = ISD::SETOGE; break; in getFCmpCondCode()
165 case FCmpInst::FCMP_UGE: FOC = ISD::SETGE; FPC = ISD::SETUGE; break; in getFCmpCondCode()
190 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h734 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
746 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h872 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
884 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h935 SETGE, // 1 X 0 1 1 True if greater than or equal enumerator
947 return Code == SETGT || Code == SETGE || Code == SETLT || Code == SETLE; in isSignedIntSetCC()
/external/llvm/lib/CodeGen/
DAnalysis.cpp191 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
205 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
DTargetLoweringBase.cpp771 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
772 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
773 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs()
774 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DAnalysis.cpp190 case ISD::SETOGE: case ISD::SETUGE: return ISD::SETGE; in getFCmpCodeWithoutNaN()
204 case ICmpInst::ICMP_SGE: return ISD::SETGE; in getICmpCondCode()
DTargetLoweringBase.cpp505 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
506 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
507 CCs[RTLIB::OGE_F128] = ISD::SETGE; in InitCmpLibcallCCs()
508 CCs[RTLIB::OGE_PPCF128] = ISD::SETGE; in InitCmpLibcallCCs()
/external/llvm/lib/Target/Hexagon/
DHexagonSelectCCInfo.td63 IntRegs:$fval, SETGE)),
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td51 defm GE_S : ComparisonInt<SETGE, "ge_s">;
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrCMovSetCC.td101 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrInteger.td52 defm GE_S : ComparisonInt<SETGE, "ge_s", 0x4e, 0x59>;
/external/llvm/lib/Target/X86/
DX86InstrCMovSetCC.td109 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrCMovSetCC.td107 defm SETGE : SETCC<0x9D, "setge", X86_COND_GE>; // signed greater or equal
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp203 case ISD::SETGE: in kill()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/
DBPFISelLowering.cpp686 case ISD::SETGE: in EmitInstrWithCustomInserter()
716 CC == ISD::SETGE || in EmitInstrWithCustomInserter()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DTargetLowering.cpp529 CCs[RTLIB::OGE_F32] = ISD::SETGE; in InitCmpLibcallCCs()
530 CCs[RTLIB::OGE_F64] = ISD::SETGE; in InitCmpLibcallCCs()
2089 case ISD::SETGE: in SimplifySetCC()
2239 if (Cond == ISD::SETGE || Cond == ISD::SETUGE) { in SimplifySetCC()
2244 (Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT); in SimplifySetCC()
2257 if ((Cond == ISD::SETGE || Cond == ISD::SETUGE) && C1 == MinVal) in SimplifySetCC()
2561 case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> ~X | Y in SimplifySetCC()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVRISelLowering.cpp422 case ISD::SETGE: in intCCToAVRCC()
448 CC = ISD::SETGE; in getAVRCmp()
473 CC = ISD::SETGE; in getAVRCmp()
492 CC = ISD::SETGE; in getAVRCmp()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstructions.td101 [{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
141 def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;

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