| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 716 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 854 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 917 SETOGT, // 0 0 1 0 True if ordered and greater than enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | README.txt | 68 SETOGT unimplemented
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| /external/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 166 case FCmpInst::FCMP_OGT: return ISD::SETOGT; in getFCmpCondCode()
190 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | Analysis.cpp | 165 case FCmpInst::FCMP_OGT: return ISD::SETOGT; in getFCmpCondCode()
189 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; in getFCmpCodeWithoutNaN()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/ |
| D | Analysis.cpp | 156 case FCmpInst::FCMP_OGT: FOC = ISD::SETGT; FPC = ISD::SETOGT; break; in getFCmpCondCode()
|
| /external/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 59 defm GT : ComparisonFP<SETOGT, "gt ">;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrFloat.td | 59 defm GT : ComparisonFP<SETOGT, "gt ", 0x5e, 0x64>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInsertSkips.cpp | 198 case ISD::SETOGT: in kill()
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelDAGToDAG.cpp | 317 case ISD::SETGT: case ISD::SETOGT: case ISD::SETUGT: in Select()
|
| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 560 case ISD::SETOGT: in getPredicateForSetCC()
585 case ISD::SETOGT: in getCRIdxForSetCC()
|
| /external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
| D | MBlazeInstrFPU.td | 169 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETOGT),
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 332 case ISD::SETOGT: return "setogt"; in getOperationName()
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 2105 case ISD::SETOGT: in getPredicateForSetCC()
2126 case ISD::SETOGT: in getCRIdxForSetCC()
2163 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
2172 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
2186 case ISD::SETOGT: in getVCmpInst()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 361 case ISD::SETOGT: return "setogt"; in getOperationName()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCISelDAGToDAG.cpp | 3636 case ISD::SETOGT: in SelectCC()
3663 case ISD::SETOGT: in SelectCC()
3696 case ISD::SETOGT: in getPredicateForSetCC()
3717 case ISD::SETOGT: in getCRIdxForSetCC()
3754 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
3763 case ISD::SETULE: CC = ISD::SETOGT; Negate = true; break; in getVCmpInst()
3777 case ISD::SETOGT: in getVCmpInst()
|
| /external/swiftshader/third_party/LLVM/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 491 def SETOEQ : CondCode; def SETOGT : CondCode;
772 (setcc node:$lhs, node:$rhs, SETOGT)>;
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 666 case ISD::SETOGT: in EmitCmp()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUInstructions.td | 96 [{return N->get() == ISD::SETOGT || N->get() == ISD::SETGT;}]
|
| D | AMDGPUISelLowering.cpp | 1012 case ISD::SETOGT: { in CombineFMinMaxLegacy()
1619 SDValue Lt0 = DAG.getSetCC(SL, SetCCVT, Src, Zero, ISD::SETOGT); in LowerFCEIL()
1714 SDValue Cond = DAG.getSetCC(SL, SetCCVT, Fabs, C2, ISD::SETOGT); in LowerFRINT()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 591 def SETOEQ : CondCode; def SETOGT : CondCode;
975 (setcc node:$lhs, node:$rhs, SETOGT)>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 572 def SETOEQ : CondCode; def SETOGT : CondCode;
1104 (setcc node:$lhs, node:$rhs, SETOGT)>;
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 259 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in MipsSETargetLowering()
264 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in MipsSETargetLowering()
395 setCondCodeAction(ISD::SETOGT, Ty, Expand); in addMSAFloatType()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 192 setCondCodeAction(ISD::SETOGT, MVT::f32, Expand); in MipsSETargetLowering()
197 setCondCodeAction(ISD::SETOGT, MVT::f64, Expand); in MipsSETargetLowering()
324 setCondCodeAction(ISD::SETOGT, Ty, Expand); in addMSAFloatType()
|