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Searched refs:SETOLT (Results 1 – 25 of 70) sorted by relevance

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/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DISDOpcodes.h718 SETOLT, // 0 1 0 0 True if ordered and less than enumerator
/external/llvm/include/llvm/CodeGen/
DISDOpcodes.h856 SETOLT, // 0 1 0 0 True if ordered and less than enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h919 SETOLT, // 0 1 0 0 True if ordered and less than enumerator
/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/
DREADME.txt70 SETOLT unimplemented
/external/llvm/lib/CodeGen/
DAnalysis.cpp168 case FCmpInst::FCMP_OLT: return ISD::SETOLT; in getFCmpCondCode()
188 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DAnalysis.cpp167 case FCmpInst::FCMP_OLT: return ISD::SETOLT; in getFCmpCondCode()
187 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DAnalysis.cpp158 case FCmpInst::FCMP_OLT: FOC = ISD::SETLT; FPC = ISD::SETOLT; break; in getFCmpCondCode()
/external/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrFloat.td57 defm LT : ComparisonFP<SETOLT, "lt ">;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/
DWebAssemblyInstrFloat.td57 defm LT : ComparisonFP<SETOLT, "lt ", 0x5d, 0x63>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/
DSIInsertSkips.cpp206 case ISD::SETOLT: in kill()
DAMDGPUInstructions.td219 [{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}]
/external/swiftshader/third_party/LLVM/lib/Target/Alpha/
DAlphaISelDAGToDAG.cpp313 case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: in Select()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp556 case ISD::SETOLT: in getPredicateForSetCC()
583 case ISD::SETOLT: in getCRIdxForSetCC()
/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/
DMBlazeInstrFPU.td172 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETOLT),
/external/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp334 case ISD::SETOLT: return "setolt"; in getOperationName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/
DSelectionDAGDumper.cpp363 case ISD::SETOLT: return "setolt"; in getOperationName()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetSelectionDAG.td492 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
776 (setcc node:$lhs, node:$rhs, SETOLT)>;
/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/
DSystemZISelLowering.cpp676 case ISD::SETOLT: in EmitCmp()
/external/llvm/lib/Target/AMDGPU/
DAMDGPUInstructions.td106 [{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}]
/external/llvm/include/llvm/Target/
DTargetSelectionDAG.td592 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
979 (setcc node:$lhs, node:$rhs, SETOLT)>;
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/
DTargetSelectionDAG.td573 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode;
1108 (setcc node:$lhs, node:$rhs, SETOLT)>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp3628 case ISD::SETOLT: in SelectCC()
3655 case ISD::SETOLT: in SelectCC()
3692 case ISD::SETOLT: in getPredicateForSetCC()
3715 case ISD::SETOLT: in getCRIdxForSetCC()
3754 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
/external/llvm/lib/Target/PowerPC/
DPPCISelDAGToDAG.cpp2101 case ISD::SETOLT: in getPredicateForSetCC()
2124 case ISD::SETOLT: in getCRIdxForSetCC()
2163 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
DPPCInstrQPX.td462 (setcc v4f64:$FRA, v4f64:$FRB, SETOLT))]>;
467 (setcc v4f32:$FRA, v4f32:$FRB, SETOLT))]>;
/external/swiftshader/third_party/LLVM/lib/Target/PTX/
DPTXInstrInfo.td588 defm SETPLTf32 : PTX_SETP_FP<RegF32, "f32", f32imm, SETULT, SETOLT, "lt">;
597 defm SETPLTf64 : PTX_SETP_FP<RegF64, "f64", f64imm, SETULT, SETOLT, "lt">;

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