/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 718 SETOLT, // 0 1 0 0 True if ordered and less than enumerator
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/external/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 856 SETOLT, // 0 1 0 0 True if ordered and less than enumerator
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 919 SETOLT, // 0 1 0 0 True if ordered and less than enumerator
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/external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
D | README.txt | 70 SETOLT unimplemented
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/external/llvm/lib/CodeGen/ |
D | Analysis.cpp | 168 case FCmpInst::FCMP_OLT: return ISD::SETOLT; in getFCmpCondCode() 188 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | Analysis.cpp | 167 case FCmpInst::FCMP_OLT: return ISD::SETOLT; in getFCmpCondCode() 187 case ISD::SETOLT: case ISD::SETULT: return ISD::SETLT; in getFCmpCodeWithoutNaN()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | Analysis.cpp | 158 case FCmpInst::FCMP_OLT: FOC = ISD::SETLT; FPC = ISD::SETOLT; break; in getFCmpCondCode()
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/external/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrFloat.td | 57 defm LT : ComparisonFP<SETOLT, "lt ">;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyInstrFloat.td | 57 defm LT : ComparisonFP<SETOLT, "lt ", 0x5d, 0x63>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SIInsertSkips.cpp | 206 case ISD::SETOLT: in kill()
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D | AMDGPUInstructions.td | 219 [{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}]
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/external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
D | AlphaISelDAGToDAG.cpp | 313 case ISD::SETLT: case ISD::SETOLT: case ISD::SETULT: in Select()
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/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 556 case ISD::SETOLT: in getPredicateForSetCC() 583 case ISD::SETOLT: in getCRIdxForSetCC()
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/external/swiftshader/third_party/LLVM/lib/Target/MBlaze/ |
D | MBlazeInstrFPU.td | 172 def : Pat<(setcc (f32 GPR:$L), (f32 GPR:$R), SETOLT),
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 334 case ISD::SETOLT: return "setolt"; in getOperationName()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAGDumper.cpp | 363 case ISD::SETOLT: return "setolt"; in getOperationName()
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/external/swiftshader/third_party/LLVM/include/llvm/Target/ |
D | TargetSelectionDAG.td | 492 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode; 776 (setcc node:$lhs, node:$rhs, SETOLT)>;
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 676 case ISD::SETOLT: in EmitCmp()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUInstructions.td | 106 [{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}]
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/external/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 592 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode; 979 (setcc node:$lhs, node:$rhs, SETOLT)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/Target/ |
D | TargetSelectionDAG.td | 573 def SETOGE : CondCode; def SETOLT : CondCode; def SETOLE : CondCode; 1108 (setcc node:$lhs, node:$rhs, SETOLT)>;
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 3628 case ISD::SETOLT: in SelectCC() 3655 case ISD::SETOLT: in SelectCC() 3692 case ISD::SETOLT: in getPredicateForSetCC() 3715 case ISD::SETOLT: in getCRIdxForSetCC() 3754 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 2101 case ISD::SETOLT: in getPredicateForSetCC() 2124 case ISD::SETOLT: in getCRIdxForSetCC() 2163 case ISD::SETOLT: CC = ISD::SETOGT; Swap = true; break; in getVCmpInst()
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D | PPCInstrQPX.td | 462 (setcc v4f64:$FRA, v4f64:$FRB, SETOLT))]>; 467 (setcc v4f32:$FRA, v4f32:$FRB, SETOLT))]>;
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/external/swiftshader/third_party/LLVM/lib/Target/PTX/ |
D | PTXInstrInfo.td | 588 defm SETPLTf32 : PTX_SETP_FP<RegF32, "f32", f32imm, SETULT, SETOLT, "lt">; 597 defm SETPLTf64 : PTX_SETP_FP<RegF64, "f64", f64imm, SETULT, SETOLT, "lt">;
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