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Searched refs:SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-uniphier/clk/
Dpll-ld4.c29 if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U || in upll_init()
96 if (clk_mode_axosel == SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U || in vpll_init()
/external/u-boot/arch/arm/mach-uniphier/
Dsg-regs.h86 #define SG_PINMON0_CLK_MODE_AXOSEL_25000KHZ_U (0x1 << 16) macro