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Searched refs:SHADER_OPCODE_TXL (Results 1 – 9 of 9) sorted by relevance

/external/mesa3d/src/intel/compiler/
Dbrw_shader.cpp219 case SHADER_OPCODE_TXL: in brw_instruction_name()
787 opcode == SHADER_OPCODE_TXL || in is_tex()
Dbrw_ir_vec4.h340 case SHADER_OPCODE_TXL: in reads_g0_implicitly()
Dbrw_eu_defines.h326 SHADER_OPCODE_TXL, enumerator
Dbrw_vec4_generator.cpp122 case SHADER_OPCODE_TXL: in generate_tex()
181 case SHADER_OPCODE_TXL: in generate_tex()
1767 case SHADER_OPCODE_TXL: in generate_code()
Dbrw_fs_generator.cpp791 case SHADER_OPCODE_TXL: in generate_tex()
903 case SHADER_OPCODE_TXL: in generate_tex()
1966 case SHADER_OPCODE_TXL: in generate_code()
Dbrw_fs.cpp979 case SHADER_OPCODE_TXL: in implied_mrf_writes()
3974 const bool has_lod = (op == SHADER_OPCODE_TXL || op == FS_OPCODE_TXB || in lower_sampler_logical_send_gen4()
4108 case SHADER_OPCODE_TXL: in lower_sampler_logical_send_gen5()
4267 case SHADER_OPCODE_TXL: in lower_sampler_logical_send_gen7()
4268 if (devinfo->gen >= 9 && op == SHADER_OPCODE_TXL && lod.is_zero()) { in lower_sampler_logical_send_gen7()
4605 lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_TXL); in lower_logical_sends()
4916 (inst->opcode == SHADER_OPCODE_TXL || in get_sampler_lowered_simd_width()
Dbrw_vec4_visitor.cpp924 case ir_tex: opcode = SHADER_OPCODE_TXL; break; in emit_texture()
925 case ir_txl: opcode = SHADER_OPCODE_TXL; break; in emit_texture()
Dbrw_schedule_instructions.cpp245 case SHADER_OPCODE_TXL: in set_latency_gen7()
Dbrw_vec4.cpp354 case SHADER_OPCODE_TXL: in implied_mrf_writes()