Searched refs:SIN_HW (Results 1 – 12 of 12) sorted by relevance
| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 235 SIN_HW, enumerator
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| D | AMDGPUInstrInfo.td | 56 def AMDGPUsin : SDNode<"AMDGPUISD::SIN_HW", SDTFPUnaryOp>;
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| D | R600Instructions.td | 403 def SIN_HW : SDNode<"AMDGPUISD::SIN_HW",
1128 inst, "SIN", [(set f32:$dst, (SIN_HW f32:$src0))]>{
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| D | SIISelLowering.cpp | 1856 return DAG.getNode(AMDGPUISD::SIN_HW, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
2376 return DAG.getNode(AMDGPUISD::SIN_HW, SDLoc(Op), VT, FractPart); in LowerTrig()
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| D | R600ISelLowering.cpp | 950 TrigNode = AMDGPUISD::SIN_HW; in LowerTrig()
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| D | AMDGPUISelLowering.cpp | 2809 NODE_NAME_CASE(SIN_HW) in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelLowering.h | 357 SIN_HW, enumerator
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| D | AMDGPUInstrInfo.td | 128 def AMDGPUsin : SDNode<"AMDGPUISD::SIN_HW", SDTFPUnaryOp>;
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| D | R600Instructions.td | 370 def SIN_HW : SDNode<"AMDGPUISD::SIN_HW",
1166 inst, "SIN", [(set f32:$dst, (SIN_HW f32:$src0))]>{
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| D | AMDGPUISelLowering.cpp | 561 case AMDGPUISD::SIN_HW: in fnegFoldsIntoOp()
3603 case AMDGPUISD::SIN_HW: { in performFNegCombine()
4014 NODE_NAME_CASE(SIN_HW) in getTargetNodeName()
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| D | R600ISelLowering.cpp | 774 TrigNode = AMDGPUISD::SIN_HW; in LowerTrig()
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| D | SIISelLowering.cpp | 4934 return DAG.getNode(AMDGPUISD::SIN_HW, DL, VT, Op.getOperand(1)); in LowerINTRINSIC_WO_CHAIN()
6113 return DAG.getNode(AMDGPUISD::SIN_HW, SDLoc(Op), VT, FractPart); in LowerTrig()
6723 case AMDGPUISD::SIN_HW: in fp16SrcZerosHighBits()
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