Home
last modified time | relevance | path

Searched refs:SLL_W (Results 1 – 14 of 14) sorted by relevance

/external/pcre/dist2/src/sljit/
DsljitNativeMIPS_common.c208 #define SLL_W SLL macro
213 #define SLL_W DSLL macro
839 … FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | D(TMP_REG3) | SH_IMM(argw), DR(TMP_REG3))); in getput_arg()
905 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(arg)) | DA(tmp_ar) | SH_IMM(argw), tmp_ar)); in emit_op_mem()
1126 FAIL_IF(push_inst(compiler, SLL_W | T(OFFS_REG(src)) | D(TMP_REG1) | SH_IMM(srcw), DR(TMP_REG1))); in emit_prefetch()
DsljitNativeSPARC_common.c190 #define SLL_W SLL macro
196 #define SLL_W SLLX macro
629 FAIL_IF(push_inst(compiler, SLL_W | D(arg2) | S1(OFFS_REG(arg)) | IMM_ARG | argw, DR(arg2))); in getput_arg()
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc1472 33578450U, // SLL_W
3186 0U, // SLL_W
DMipsGenDisassemblerTables.inc1721 /* 5383 */ MCD_OPC_Decode, 175, 11, 116, // Opcode: SLL_W
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc2354 UINT64_C(2017460237), // SLL_W
7398 case Mips::SLL_W:
10080 Feature_HasStdEnc | Feature_HasMSA | 0, // SLL_W = 2341
DMipsGenAsmWriter.inc3569 268460353U, // SLL_W
6200 0U, // SLL_W
DMipsGenFastISel.inc2045 return fastEmitInst_rr(Mips::SLL_W, &Mips::MSA128WRegClass, Op0, Op0IsKill, Op1, Op1IsKill);
DMipsGenDAGISel.inc20652 /* 38230*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SLL_W), 0,
20655 // Dst: (SLL_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$ws, v4i32:{ *:[v4i32] }:$wt)
20685 /* 38288*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SLL_W), 0,
20688 // Dst: (SLL_W:{ *:[v4i32] } v4i32:{ *:[v4i32] }:$ws, v4i32:{ *:[v4i32] }:$wt)
20768 /* 38440*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::SLL_W), 0,
20771 … // Dst: (SLL_W:{ *:[v4i32] } MSA128WOpnd:{ *:[v4i32] }:$ws, MSA128WOpnd:{ *:[v4i32] }:$wt)
DMipsGenInstrInfo.inc2356 SLL_W = 2341,
6401 …41, 3, 1, 4, 602, 0, 0x6ULL, nullptr, nullptr, OperandInfo34, -1 ,nullptr }, // Inst #2341 = SLL_W
DMipsGenGlobalISel.inc12570 …32] } MSA128WOpnd:{ *:[v4i32] }:$ws, MSA128WOpnd:{ *:[v4i32] }:$wt) => (SLL_W:{ *:[v4i32] } MSA1…
12571 GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/Mips::SLL_W,
DMipsGenDisassemblerTables.inc4185 /* 7076 */ MCD::OPC_Decode, 165, 18, 252, 1, // Opcode: SLL_W
DMipsGenAsmMatcher.inc7289 …{ 8344 /* sll.w */, Mips::SLL_W, Convert__MSA128AsmReg1_0__MSA128AsmReg1_1__MSA128AsmReg1_2, Featu…
/external/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3405 def SLL_W : SLL_W_ENC, SLL_W_DESC;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsMSAInstrInfo.td3426 def SLL_W : SLL_W_ENC, SLL_W_DESC;