Searched refs:SMMU_BASE (Results 1 – 4 of 4) sorted by relevance
89 #define SMMU_SCR0 (SMMU_BASE + 0x0)90 #define SMMU_SCR1 (SMMU_BASE + 0x4)91 #define SMMU_SCR2 (SMMU_BASE + 0x8)92 #define SMMU_SACR (SMMU_BASE + 0x10)93 #define SMMU_IDR0 (SMMU_BASE + 0x20)94 #define SMMU_IDR1 (SMMU_BASE + 0x24)96 #define SMMU_NSCR0 (SMMU_BASE + 0x400)97 #define SMMU_NSCR2 (SMMU_BASE + 0x408)98 #define SMMU_NSACR (SMMU_BASE + 0x410)
52 #define SMMU_BASE 0x05000000 /* GR0 Base */ macro147 #define SMMU_BASE 0x05000000 /* GR0 Base */ macro216 #define SMMU_BASE 0x09000000 macro274 #define SMMU_BASE 0x09000000 macro
653 #define SMMU_SCR0 (SMMU_BASE + 0x0)654 #define SMMU_SCR1 (SMMU_BASE + 0x4)655 #define SMMU_SCR2 (SMMU_BASE + 0x8)656 #define SMMU_SACR (SMMU_BASE + 0x10)657 #define SMMU_IDR0 (SMMU_BASE + 0x20)658 #define SMMU_IDR1 (SMMU_BASE + 0x24)660 #define SMMU_NSCR0 (SMMU_BASE + 0x400)661 #define SMMU_NSCR2 (SMMU_BASE + 0x408)662 #define SMMU_NSACR (SMMU_BASE + 0x410)
174 #ifdef SMMU_BASE176 ldr x1, =SMMU_BASE