Searched refs:SOPP (Results 1 – 13 of 13) sorted by relevance
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | SOPInstructions.td | 796 // SOPP Instructions 807 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern = []> : 814 let SOPP = 1; 823 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "s_nop $simm16">; 827 def S_ENDPGM : SOPP <0x00000001, (ins), "s_endpgm", 835 def S_ENDPGM_SAVED : SOPP <0x0000001B, (ins), "s_endpgm_saved"> { 845 SOPP<0x01e, (ins), "s_endpgm_ordered_ps_done">; 850 def S_BRANCH : SOPP < 857 def S_CBRANCH_SCC0 : SOPP < 861 def S_CBRANCH_SCC1 : SOPP < [all …]
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D | SIInstrFormats.td | 36 field bit SOPP = 0; 132 let TSFlags{6} = SOPP;
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D | SIDefines.h | 30 SOPP = 1 << 6, enumerator
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D | SIInstrInfo.h | 357 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP() 361 return get(Opcode).TSFlags & SIInstrFlags::SOPP; in isSOPP()
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/external/llvm/docs/ |
D | AMDGPUUsage.rst | 75 SOPP Instructions 78 Unless otherwise mentioned, all SOPP instructions that have one or more
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/external/llvm/lib/Target/AMDGPU/ |
D | SIInstrFormats.td | 29 field bits<1> SOPP = 0; 65 let TSFlags{9} = SOPP; 331 class SOPP <bits<7> op, dag ins, string asm, list<dag> pattern = []> : 338 let SOPP = 1;
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D | SIInstructions.td | 421 // SOPP Instructions 424 def S_NOP : SOPP <0x00000000, (ins i16imm:$simm16), "s_nop $simm16">; 428 def S_ENDPGM : SOPP <0x00000001, (ins), "s_endpgm", 437 def S_BRANCH : SOPP < 444 def S_CBRANCH_SCC0 : SOPP < 448 def S_CBRANCH_SCC1 : SOPP < 456 def S_CBRANCH_VCCZ : SOPP < 460 def S_CBRANCH_VCCNZ : SOPP < 467 def S_CBRANCH_EXECZ : SOPP < 471 def S_CBRANCH_EXECNZ : SOPP < [all …]
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D | SIDefines.h | 26 SOPP = 1 << 9, enumerator
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D | SIInstrInfo.h | 240 return MI.getDesc().TSFlags & SIInstrFlags::SOPP; in isSOPP() 244 return get(Opcode).TSFlags & SIInstrFlags::SOPP; in isSOPP()
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/external/swiftshader/third_party/llvm-7.0/llvm/docs/ |
D | AMDGPUUsage.rst | 4229 SOPP subsubsection 4246 For full list of supported instructions, refer to "SOPP Instructions" in ISA Manual. 4249 of SOPP Instructions, so it is up to the programmer to be familiar with the
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D | AMDGPUAsmGFX7.rst | 517 SOPP chapter
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D | AMDGPUAsmGFX8.rst | 539 SOPP chapter
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D | AMDGPUAsmGFX9.rst | 692 SOPP chapter
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