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Searched refs:SPE (Results 1 – 22 of 22) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
Dfast-isel-conversion.ll8 …neinstrs -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe | FileCheck %s --check-prefix=SPE
46 ; SPE: efscfsi
66 ; SPE: extsh
67 ; SPE: efscfsi
87 ; SPE: extsb
88 ; SPE: efscfsi
108 ; SPE: efdcfsi
143 ; SPE: extsh
144 ; SPE: efdcfsi
163 ; SPE: extsb
[all …]
Dfast-isel-load-store.ll6 …abort=1 -mattr=spe -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 | FileCheck %s --check-prefix=SPE
66 ; SPE: t5
69 ; SPE: lwz
72 ; SPE: efsadd
78 ; SPE: t6
81 ; SPE: evldd
84 ; SPE: efdadd
136 ; SPE: t11
141 ; SPE: efsadd
142 ; SPE: stw
[all …]
Dfast-isel-cmp-imm.ll6 …-abort=1 -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe | FileCheck %s --check-prefix=SPE
10 ; SPE: t1a
15 ; SPE: efscmpeq
31 ; SPE: t1b
36 ; SPE: efscmpeq
50 ; SPE: t2a
55 ; SPE: efdcmpeq
69 ; SPE: t2b
74 ; SPE: efdcmpeq
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCRegisterInfo.td41 // SPE - One of the 32 64-bit general-purpose registers (SPE)
42 class SPE<GPR SubReg, string n> : PPCReg<n> {
110 // SPE registers
112 def S#Index : SPE<!cast<GPR>("R"#Index), "r"#Index>,
224 // SPE extra registers
225 // SPE Accumulator for multiply-accumulate SPE operations. Never directly
DPPCCallingConv.td214 // With SPE floats are stored as single precision, so have alignment and
286 // SPE does not use FPRs, so break out the common register set as base.
DPPCScheduleP9.td38 // Do not support QPX (Quad Processing eXtension) or SPE (Signal Procesing
DPPCInstrSPE.td1 //=======-- PPCInstrSPE.td - The PowerPC SPE Extension -*- tablegen -*-=======//
139 let DecoderNamespace = "SPE", Predicates = [HasSPE] in {
334 // SPE Vector operations
DPPC.td71 "Enable SPE instructions",
DP9InstrResources.td1342 // Signal Processing Engine (SPE) Instructions
DPPCInstrInfo.td831 def spe8dis : Operand<iPTR> { // SPE displacement where the imm is 8-aligned.
837 def spe4dis : Operand<iPTR> { // SPE displacement where the imm is 4-aligned.
843 def spe2dis : Operand<iPTR> { // SPE displacement where the imm is 2-aligned.
/external/libjpeg-turbo/simd/
DCMakeLists.txt345 simd_fail("SIMD extensions not available for this CPU (PowerPC SPE)")
/external/clang/lib/AST/
DItaniumMangle.cpp3872 auto *SPE = cast<SizeOfPackExpr>(E); in mangleExpression() local
3873 if (SPE->isPartiallySubstituted()) { in mangleExpression()
3875 for (const auto &A : SPE->getPartialArguments()) in mangleExpression()
3882 const NamedDecl *Pack = SPE->getPack(); in mangleExpression()
/external/llvm/lib/Target/PowerPC/
DPPC.td65 "Enable SPE instructions">;
DPPCInstrSPE.td1 //=======-- PPCInstrSPE.td - The PowerPC SPE Extension -*- tablegen -*-=======//
DPPCInstrInfo.td722 def spe8dis : Operand<iPTR> { // SPE displacement where the imm is 8-aligned.
727 def spe4dis : Operand<iPTR> { // SPE displacement where the imm is 4-aligned.
732 def spe2dis : Operand<iPTR> { // SPE displacement where the imm is 2-aligned.
/external/cldr/tools/java/org/unicode/cldr/util/data/external/
DsubdivisionData.txt3865 RU-SPE Sankt-Petersburg
D2013-1_UNLOCODE_CodeListPart2.csv4610 ,"GB","SPE","Spellbrook","Spellbrook","HRT","--3-----","AF","9511",,,
6352 ,"GR","SPE","Sp�tsai","Spetsai",,"1-------","AI","0212",,"3716N 02309E",
7362 ,"HU","SPE","Isaszeg","Isaszeg","PE","--3-----","RL","1207",,"4732N 01924E",
9177 ,"IN","SPE","Asdipl-SEZ/Nellore","Asdipl-SEZ/Nellore","AP","-----6--","RQ","1001",,"1426N 07958E",
12711 ,"IT","SPE","La Spezia","La Spezia",,"1-------","AI","1201",,"4407N 00950E",""
20164 ,"MY","SPE","Sepulot","Sepulot",,"---4----","AI","0001",,,
D2013-1_UNLOCODE_CodeListPart1.csv3417 ,"AU","SPE","Spearwood","Spearwood","WA","--3-----","RL","0901",,"3210S 11578E",
5249 ,"BE","SPE","Scheepsdale","Scheepsdale","VWV","1-3-----","RN","0307",,"5113N 00312E",
7911 ,"BR","SPE","Sao Pedro Alcantara","Sao Pedro Alcantara","SC","--3-----","RQ","0607",,,
10681 ,"CA","SPE","Sprague","Sprague","MB","-23-----","RL","0307",,"4902N 09539W",
12826 ,"CL","SPE","San Pedro","San Pedro","RM","--3-----","RN","0501",,"3354S 07128W",
23969 ,"DE","SPE","Speyer","Speyer","RP","123-----","AF","9501",,,
27271 "X","EE","SPE","Suurpea lauter","Suurpea lauter",,"1-------","XX","1301",,"5938N 02541E",""
30664 ,"ES","SPE","Sant Pere de Ribes","Sant Pere de Ribes",,"--3-----","RQ","0907",,,
31966 ,"FI","SPE","Savitaipale","Savitaipale","ES","--3-----","RL","0501",,"6112N 02742E",
41773 ,"FR","SPE","Saint-Pierre-�glise","Saint-Pierre-Eglise","50","--3-----","RL","1101",,"4940N 00124W"…
D2013-1_UNLOCODE_CodeListPart3.csv5078 ,"RU","LED","Saint Petersburg (ex Leningrad)","Saint Petersburg (ex Leningrad)","SPE","12345---","A…
5120 ,"RU","SSR","Shushary","Shushary","SPE","-----6--","RQ","1007",,"5946N 03028E",
25034 ,"US","SPE","Sun Prairie","Sun Prairie","WI","--3-----","RQ","9307",,,
/external/cldr/tools/java/org/unicode/cldr/util/data/
Deurope2543 # 78 RU-SPE Saint Petersburg
/external/toolchain-utils/android_bench_suite/panorama_input/
Dtest_003.ppm1618 …��,&#b]Z��~wol[SPE=:4,(, '! �����K-00'%�vWXgHI:X8:Z<?^?C8#*5S8=I/1,…
Dtest_007.ppm9181 …~bolPdd1mm;�Bz|<��C�=��Ylm6{xSQO)5-=5'H>6g^V{vnhd[}ws�}x_YT?:5ia^������[SPE=:F>;JDBICAMHE?:7=:8…