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Searched refs:SPECIAL3 (Results 1 – 9 of 9) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsMTInstrFormats.td79 let Inst{31-26} = 0b011111; // SPECIAL3
92 let Inst{31-26} = 0b011111; // SPECIAL3
/external/v8/src/mips64/
Dassembler-mips64.cc2457 GenInstrImmediate(SPECIAL3, rs.rm(), rd, rs.offset_, 0, LL_R6); in ll()
2468 GenInstrImmediate(SPECIAL3, rs.rm(), rd, rs.offset_, 0, LLD_R6); in lld()
2479 GenInstrImmediate(SPECIAL3, rs.rm(), rd, rs.offset_, 0, SC_R6); in sc()
2489 GenInstrImmediate(SPECIAL3, rs.rm(), rd, rs.offset_, 0, SCD_R6); in scd()
2851 GenInstrRegister(SPECIAL3, rs, rt, pos + size - 1, pos, INS); in ins_()
2859 GenInstrRegister(SPECIAL3, rs, rt, pos + size - 1, pos, DINS); in dins_()
2866 GenInstrRegister(SPECIAL3, rs, rt, pos + size - 1 - 32, pos, DINSM); in dinsm_()
2873 GenInstrRegister(SPECIAL3, rs, rt, pos + size - 1 - 32, pos - 32, DINSU); in dinsu_()
2880 GenInstrRegister(SPECIAL3, rs, rt, size - 1, pos, EXT); in ext_()
2888 GenInstrRegister(SPECIAL3, rs, rt, size - 1, pos, DEXT); in dext_()
[all …]
Dconstants-mips64.h430 SPECIAL3 = ((3U << 3) + 7) << kOpcodeShift, enumerator
1772 case SPECIAL3: in InstructionType()
Ddisasm-mips64.cc1869 case SPECIAL3: in DecodeTypeRegister()
2316 case SPECIAL3: in DecodeTypeImmediate()
Dsimulator-mips64.cc6467 case SPECIAL3: in DecodeTypeRegister()
7137 case SPECIAL3: { in DecodeTypeImmediate()
/external/v8/src/mips/
Dassembler-mips.cc2304 GenInstrImmediate(SPECIAL3, rs.rm(), rd, rs.offset_, 0, LL_R6); in ll()
2316 GenInstrImmediate(SPECIAL3, rs.rm(), rd, rs.offset_, 0, SC_R6); in sc()
2533 GenInstrRegister(SPECIAL3, rs, rt, pos + size - 1, pos, INS); in ins_()
2541 GenInstrRegister(SPECIAL3, rs, rt, size - 1, pos, EXT); in ext_()
2547 GenInstrRegister(SPECIAL3, zero_reg, rt, rd, 0, BSHFL); in bitswap()
2564 GenInstrRegister(SPECIAL3, rs, rt, rd, sa, BSHFL); in align()
2570 GenInstrRegister(SPECIAL3, zero_reg, rt, rd, WSBH, BSHFL); in wsbh()
2575 GenInstrRegister(SPECIAL3, zero_reg, rt, rd, SEH, BSHFL); in seh()
2580 GenInstrRegister(SPECIAL3, zero_reg, rt, rd, SEB, BSHFL); in seb()
Dconstants-mips.h456 SPECIAL3 = ((3U << 3) + 7) << kOpcodeShift, enumerator
1713 case SPECIAL3: in InstructionType()
Ddisasm-mips.cc1643 case SPECIAL3: in DecodeTypeRegister()
2002 case SPECIAL3: in DecodeTypeImmediate()
Dsimulator-mips.cc6236 case SPECIAL3: in DecodeTypeRegister()
6806 case SPECIAL3: { in DecodeTypeImmediate()