Searched refs:SPRN_L1CSR1 (Results 1 – 3 of 3) sorted by relevance
| /external/u-boot/arch/powerpc/cpu/mpc85xx/ |
| D | start.S | 773 mtspr SPRN_L1CSR1,r2
775 mfspr r3,SPRN_L1CSR1
781 mtspr SPRN_L1CSR1,r3
784 mfspr r3,SPRN_L1CSR1
935 mtspr SPRN_L1CSR1,r3
938 mfspr r4,SPRN_L1CSR1
946 mtspr SPRN_L1CSR1,r3
949 mfspr r4,SPRN_L1CSR1
985 mfspr r11, SPRN_L1CSR1
989 mtspr SPRN_L1CSR1, r11
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| D | release.S | 104 mtspr SPRN_L1CSR1,r2
106 mfspr r3,SPRN_L1CSR1
112 mtspr SPRN_L1CSR1,r3
115 mfspr r3,SPRN_L1CSR1
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | processor.h | 491 #define SPRN_L1CSR1 0x3f3 /* L1 Instruction Cache Control and Status Register 1 */ macro
734 #define L1CSR1 SPRN_L1CSR1
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