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Searched refs:SPRN_TBWL (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dmp.c312 mtspr(SPRN_TBWL, 0); in plat_mp_up()
388 mtspr(SPRN_TBWL, 0); in plat_mp_up()
/external/u-boot/arch/powerpc/include/asm/
Dprocessor.h369 #define SPRN_TBWL 0x11C /* Time Base Write Lower Register */ macro
682 #define TBWL SPRN_TBWL /* Time Base Write Lower Register */