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Searched refs:SPRN_TSR (Results 1 – 3 of 3) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dinterrupts.c98 mtspr(SPRN_TSR, TSR_PIS); in timer_interrupt_cpu()
Dcpu.c355 mtspr(SPRN_TSR, TSR_WIS); in reset_85xx_watchdog()
/external/u-boot/arch/powerpc/include/asm/
Dprocessor.h412 #define SPRN_TSR 0x3D8 /* Timer Status Register */ macro
414 #define SPRN_TSR 0x150 /* Book E Timer Status Register */ macro
685 #define TSR SPRN_TSR /* Timer Status Register */