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Searched refs:SPSR_abt (Results 1 – 15 of 15) sorted by relevance

/external/llvm/test/MC/ARM/
Dmove-banked-regs.s76 @ CHECK-ARM: mrs r9, SPSR_abt @ encoding: [0x00,0x93,0x44,0xe1]
79 @ CHECK-THUMB: mrs r9, SPSR_abt @ encoding: [0xf4,0xf3,0x30,0x89]
186 @ CHECK-ARM: msr SPSR_abt, r9 @ encoding: [0x09,0xf3,0x64,0xe1]
189 @ CHECK-THUMB: msr SPSR_abt, r9 @ encoding: [0x99,0xf3,0x30,0x84]
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/
Dmove-banked-regs.s76 @ CHECK-ARM: mrs r9, SPSR_abt @ encoding: [0x00,0x93,0x44,0xe1]
79 @ CHECK-THUMB: mrs r9, SPSR_abt @ encoding: [0xf4,0xf3,0x30,0x89]
186 @ CHECK-ARM: msr SPSR_abt, r9 @ encoding: [0x09,0xf3,0x64,0xe1]
189 @ CHECK-THUMB: msr SPSR_abt, r9 @ encoding: [0x99,0xf3,0x30,0x84]
/external/llvm/test/MC/Disassembler/ARM/
Dmove-banked-regs-thumb.txt54 @ CHECK: mrs r9, SPSR_abt
131 @ CHECK: msr SPSR_abt, r9
Dmove-banked-regs-arm.txt55 @ CHECK: mrs r9, SPSR_abt
129 @ CHECK: msr SPSR_abt, r9
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/
Dmove-banked-regs-thumb.txt54 @ CHECK: mrs r9, SPSR_abt
131 @ CHECK: msr SPSR_abt, r9
Dmove-banked-regs-arm.txt55 @ CHECK: mrs r9, SPSR_abt
129 @ CHECK: msr SPSR_abt, r9
/external/vixl/src/aarch32/
Dinstructions-aarch32.cc348 case SPSR_abt: in GetName()
Dinstructions-aarch32.h818 SPSR_abt = 0x34, enumerator
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s3807 msr SPSR_abt, x12
4355 mrs x9, SPSR_abt
/external/llvm/test/MC/AArch64/
Dbasic-a64-instructions.s3824 msr SPSR_abt, x12
4372 mrs x9, SPSR_abt
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/
DAArch64GenSystemOperands.inc386 SPSR_abt = 57881,
2213 { "SPSR_abt", 0xE219, true, true, {} }, // 231
/external/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td575 def : RWSysReg<"SPSR_abt", 0b11, 0b100, 0b0100, 0b0011, 0b001>;
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64SystemOperands.td745 def : RWSysReg<"SPSR_abt", 0b11, 0b100, 0b0100, 0b0011, 0b001>;
/external/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3297 # CHECK: msr {{SPSR_abt|SPSR_ABT}}, x12
3589 # CHECK: mrs x9, {{SPSR_abt|SPSR_ABT}}
/external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/AArch64/
Dbasic-a64-instructions.txt3281 # CHECK: msr {{SPSR_abt|SPSR_ABT}}, x12
3574 # CHECK: mrs x9, {{SPSR_abt|SPSR_ABT}}