Searched refs:SPSR_svc (Results 1 – 8 of 8) sorted by relevance
| /external/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 66 @ CHECK-ARM: mrs r5, SPSR_svc @ encoding: [0x00,0x53,0x42,0xe1]
69 @ CHECK-THUMB: mrs r5, SPSR_svc @ encoding: [0xf2,0xf3,0x30,0x85]
176 @ CHECK-ARM: msr SPSR_svc, r5 @ encoding: [0x05,0xf3,0x62,0xe1]
179 @ CHECK-THUMB: msr SPSR_svc, r5 @ encoding: [0x95,0xf3,0x30,0x82]
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/ARM/ |
| D | move-banked-regs.s | 66 @ CHECK-ARM: mrs r5, SPSR_svc @ encoding: [0x00,0x53,0x42,0xe1]
69 @ CHECK-THUMB: mrs r5, SPSR_svc @ encoding: [0xf2,0xf3,0x30,0x85]
176 @ CHECK-ARM: msr SPSR_svc, r5 @ encoding: [0x05,0xf3,0x62,0xe1]
179 @ CHECK-THUMB: msr SPSR_svc, r5 @ encoding: [0x95,0xf3,0x30,0x82]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 47 @ CHECK: mrs r5, SPSR_svc
124 @ CHECK: msr SPSR_svc, r5
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| D | move-banked-regs-arm.txt | 48 @ CHECK: mrs r5, SPSR_svc
122 @ CHECK: msr SPSR_svc, r5
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| /external/swiftshader/third_party/llvm-7.0/llvm/test/MC/Disassembler/ARM/ |
| D | move-banked-regs-thumb.txt | 47 @ CHECK: mrs r5, SPSR_svc
124 @ CHECK: msr SPSR_svc, r5
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| D | move-banked-regs-arm.txt | 48 @ CHECK: mrs r5, SPSR_svc
122 @ CHECK: msr SPSR_svc, r5
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| /external/vixl/src/aarch32/ |
| D | instructions-aarch32.cc | 346 case SPSR_svc: in GetName()
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| D | instructions-aarch32.h | 817 SPSR_svc = 0x32, enumerator
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