/external/llvm/lib/CodeGen/ |
D | RenameIndependentSubregs.cpp | 69 LiveInterval::SubRange *SR; member 72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, in SubRangeInfo() 74 : ConEQ(LIS), SR(&SR), Index(Index) {} in SubRangeInfo() 161 for (LiveInterval::SubRange &SR : LI.subranges()) { in findComponents() 162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); in findComponents() 165 unsigned NumSubComponents = ConEQ.Classify(SR); in findComponents() 186 const LiveInterval::SubRange &SR = *SRInfo.SR; in findComponents() local 187 if ((SR.LaneMask & LaneMask) == 0) in findComponents() 192 const VNInfo *VNI = SR.getVNInfoAt(Pos); in findComponents() 230 const LiveInterval::SubRange &SR = *SRInfo.SR; in rewriteOperands() local [all …]
|
D | VirtRegMap.cpp | 254 for (const LiveInterval::SubRange &SR : LI.subranges()) { in addLiveInsForSubRanges() local 255 SubRanges.push_back(std::make_pair(&SR, SR.begin())); in addLiveInsForSubRanges() 256 if (!First.isValid() || SR.segments.front().start < First) in addLiveInsForSubRanges() 257 First = SR.segments.front().start; in addLiveInsForSubRanges() 258 if (!Last.isValid() || SR.segments.back().end > Last) in addLiveInsForSubRanges() 259 Last = SR.segments.back().end; in addLiveInsForSubRanges() 271 const LiveInterval::SubRange *SR = RangeIterPair.first; in addLiveInsForSubRanges() local 273 while (SRI != SR->end() && SRI->end <= MBBBegin) in addLiveInsForSubRanges() 275 if (SRI == SR->end()) in addLiveInsForSubRanges() 278 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges() [all …]
|
D | MachineCopyPropagation.cpp | 90 for (MCSubRegIterator SR(Reg, &TRI, true); SR.isValid(); ++SR) in removeRegsFromMap() local 91 Map.erase(*SR); in removeRegsFromMap() 239 for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid(); in CopyPropagateBlock() local 240 ++SR) { in CopyPropagateBlock() 241 CopyMap[*SR] = MI; in CopyPropagateBlock() 242 AvailCopyMap[*SR] = MI; in CopyPropagateBlock()
|
D | DeadMachineInstructionElim.cpp | 151 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); in runOnMachineFunction() local 152 SR.isValid(); ++SR) in runOnMachineFunction() 153 LivePhysRegs.reset(*SR); in runOnMachineFunction()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | RenameIndependentSubregs.cpp | 69 LiveInterval::SubRange *SR; member 72 SubRangeInfo(LiveIntervals &LIS, LiveInterval::SubRange &SR, in SubRangeInfo() 74 : ConEQ(LIS), SR(&SR), Index(Index) {} in SubRangeInfo() 161 for (LiveInterval::SubRange &SR : LI.subranges()) { in findComponents() 162 SubRangeInfos.push_back(SubRangeInfo(*LIS, SR, NumComponents)); in findComponents() 165 unsigned NumSubComponents = ConEQ.Classify(SR); in findComponents() 186 const LiveInterval::SubRange &SR = *SRInfo.SR; in findComponents() local 187 if ((SR.LaneMask & LaneMask).none()) in findComponents() 192 const VNInfo *VNI = SR.getVNInfoAt(Pos); in findComponents() 231 const LiveInterval::SubRange &SR = *SRInfo.SR; in rewriteOperands() local [all …]
|
D | RegUsageInfoCollector.cpp | 164 for (MCSubRegIterator SR(Reg, &TRI, false); SR.isValid(); ++SR) in computeCalleeSavedRegs() local 165 SavedRegs.set(*SR); in computeCalleeSavedRegs() 185 for (MCSubRegIterator SR(PReg, &TRI, false); SR.isValid(); ++SR) in computeCalleeSavedRegs() local 186 if (!SavedRegs.test(*SR)) { in computeCalleeSavedRegs()
|
D | VirtRegMap.cpp | 279 for (const LiveInterval::SubRange &SR : LI.subranges()) { in addLiveInsForSubRanges() local 280 SubRanges.push_back(std::make_pair(&SR, SR.begin())); in addLiveInsForSubRanges() 281 if (!First.isValid() || SR.segments.front().start < First) in addLiveInsForSubRanges() 282 First = SR.segments.front().start; in addLiveInsForSubRanges() 283 if (!Last.isValid() || SR.segments.back().end > Last) in addLiveInsForSubRanges() 284 Last = SR.segments.back().end; in addLiveInsForSubRanges() 296 const LiveInterval::SubRange *SR = RangeIterPair.first; in addLiveInsForSubRanges() local 298 while (SRI != SR->end() && SRI->end <= MBBBegin) in addLiveInsForSubRanges() 300 if (SRI == SR->end()) in addLiveInsForSubRanges() 303 LaneMask |= SR->LaneMask; in addLiveInsForSubRanges() [all …]
|
D | MachineCopyPropagation.cpp | 145 for (MCSubRegIterator SR(Reg, &TRI, true); SR.isValid(); ++SR) in removeRegsFromMap() local 146 Map.erase(*SR); in removeRegsFromMap() 473 for (MCSubRegIterator SR(Def, TRI, /*IncludeSelf=*/true); SR.isValid(); in CopyPropagateBlock() local 474 ++SR) { in CopyPropagateBlock() 475 CopyMap[*SR] = MI; in CopyPropagateBlock() 476 AvailCopyMap[*SR] = MI; in CopyPropagateBlock()
|
D | DeadMachineInstructionElim.cpp | 147 for (MCSubRegIterator SR(Reg, TRI,/*IncludeSelf=*/true); in runOnMachineFunction() local 148 SR.isValid(); ++SR) in runOnMachineFunction() 149 LivePhysRegs.reset(*SR); in runOnMachineFunction()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 115 // sub / add which can clobber SR. 116 let Defs = [SP, SR], Uses = [SP] in { 125 let Defs = [SR], Uses = [SP] in { 131 let Uses = [SR] in { 141 let Defs = [SR] in { 203 let Uses = [SR] in 218 let Defs = [R11, R12, R13, R14, R15, SR], 348 let Defs = [SR] in { 356 (implicit SR)]>; 361 (implicit SR)]>; [all …]
|
/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 114 // sub / add which can clobber SR. 115 let Defs = [SP, SR], Uses = [SP] in { 133 let Defs = [SR] in { 195 let Uses = [SR] in 210 let Defs = [R12, R13, R14, R15, SR], 340 let Defs = [SR] in { 348 (implicit SR)]>; 353 (implicit SR)]>; 360 (implicit SR)]>; 365 (implicit SR)]>; [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
D | helloworld.ll | 7 …inux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR 18 ; SR: .set mips16 22 ; SR-NOT: .set noreorder 23 ; SR-NOT: .set nomacro 24 ; SR-NOT: .set noat 28 ; SR: save $ra, 24 # 16 bit inst 39 ; SR: restore $ra, 24 # 16 bit inst 50 ; SR-NOT: .set at 51 ; SR-NOT: .set macro 52 ; SR-NOT: .set reorder [all …]
|
/external/llvm/test/CodeGen/Mips/ |
D | helloworld.ll | 7 …inux-gnu -march=mipsel -mattr=mips16 -relocation-model=pic -O3 < %s | FileCheck %s -check-prefix=SR 18 ; SR: .set mips16 22 ; SR-NOT: .set noreorder 23 ; SR-NOT: .set nomacro 24 ; SR-NOT: .set noat 28 ; SR: save $ra, 24 # 16 bit inst 39 ; SR: restore $ra, 24 # 16 bit inst 50 ; SR-NOT: .set at 51 ; SR-NOT: .set macro 52 ; SR-NOT: .set reorder [all …]
|
/external/elfutils/backends/ |
D | i386_corenote.c | 47 #define SR(at, n, dwreg) \ macro 55 SR (7, 1, 43), /* %ds */ 56 SR (8, 1, 40), /* %es */ 57 SR (9, 1, 44), /* %fs */ 58 SR (10, 1, 45), /* %gs */ 61 SR (13, 1, 41), /* %cs */ 64 SR (16, 1, 42), /* %ss */ 67 #undef SR
|
D | x86_64_corenote.c | 54 #define SR(at, n, dwreg) \ macro 73 SR (17,1, 51), /* %cs */ 76 SR (20,1, 52), /* %ss */ 78 SR (23,1, 53), /* %ds */ 79 SR (24,1, 50), /* %es */ 80 SR (25,2, 54), /* %fs-%gs */ 83 #undef SR
|
/external/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfExpression.cpp | 104 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local 105 Reg = TRI.getDwarfRegNum(*SR, false); in AddMachineRegPiece() 107 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); in AddMachineRegPiece() 137 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in AddMachineRegPiece() local 138 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); in AddMachineRegPiece() 141 Reg = TRI.getDwarfRegNum(*SR, false); in AddMachineRegPiece()
|
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/XCore/ |
D | epilogue_prologue.ll | 4 ; When using SP for small frames, we don't need any scratch registers (SR). 8 ; FP + small frame: spill FP+SR = entsp 2 29 ; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1 62 ; FP + large frame: spill FP+SR = entsp 2 + 100000 78 ; !FP + large frame: spill SR+SR = entsp 2 + 100000 94 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1 139 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000 187 ; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1 201 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 256 215 ; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1 [all …]
|
/external/llvm/test/CodeGen/XCore/ |
D | epilogue_prologue.ll | 4 ; When using SP for small frames, we don't need any scratch registers (SR). 8 ; FP + small frame: spill FP+SR = entsp 2 29 ; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1 62 ; FP + large frame: spill FP+SR = entsp 2 + 100000 83 ; !FP + large frame: spill SR+SR = entsp 2 + 100000 102 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1 155 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000 209 ; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1 223 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 256 237 ; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1 [all …]
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/AsmPrinter/ |
D | DwarfExpression.cpp | 106 for (MCSuperRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in addMachineReg() local 107 Reg = TRI.getDwarfRegNum(*SR, false); in addMachineReg() 109 unsigned Idx = TRI.getSubRegIndex(*SR, MachineReg); in addMachineReg() 131 for (MCSubRegIterator SR(MachineReg, &TRI); SR.isValid(); ++SR) { in addMachineReg() local 132 unsigned Idx = TRI.getSubRegIndex(MachineReg, *SR); in addMachineReg() 135 Reg = TRI.getDwarfRegNum(*SR, false); in addMachineReg()
|
/external/webrtc/webrtc/modules/rtp_rtcp/source/ |
D | rtcp_utility.cc | 575 _packet.SR.SenderSSRC = *_ptrRTCPData++ << 24; in ParseSR() 576 _packet.SR.SenderSSRC += *_ptrRTCPData++ << 16; in ParseSR() 577 _packet.SR.SenderSSRC += *_ptrRTCPData++ << 8; in ParseSR() 578 _packet.SR.SenderSSRC += *_ptrRTCPData++; in ParseSR() 580 _packet.SR.NTPMostSignificant = *_ptrRTCPData++ << 24; in ParseSR() 581 _packet.SR.NTPMostSignificant += *_ptrRTCPData++ << 16; in ParseSR() 582 _packet.SR.NTPMostSignificant += *_ptrRTCPData++ << 8; in ParseSR() 583 _packet.SR.NTPMostSignificant += *_ptrRTCPData++; in ParseSR() 585 _packet.SR.NTPLeastSignificant = *_ptrRTCPData++ << 24; in ParseSR() 586 _packet.SR.NTPLeastSignificant += *_ptrRTCPData++ << 16; in ParseSR() [all …]
|
/external/llvm/lib/Target/Hexagon/ |
D | RDFCopy.cpp | 67 RegisterRef SR = { I.Reg, I.SubReg }; in interpretAsCopy() local 68 EM.insert(std::make_pair(DR, SR)); in interpretAsCopy() 187 RegisterRef SR = FR->second; in run() local 188 if (DR == SR) in run() 191 auto &RDefSR = RDefMap[SR]; in run() 213 << " with " << Print<RegisterRef>(SR, DFG) << " in " in run() 217 Op.setReg(SR.Reg); in run() 218 Op.setSubReg(SR.Sub); in run() 241 J.second = SR; in run()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/DebugInfo/CodeView/ |
D | RecordSerialization.cpp | 108 BinaryStreamReader SR(S); in consume() local 109 auto EC = consume(SR, Num); in consume() 110 Data = Data.take_back(SR.bytesRemaining()); in consume() 134 BinaryStreamReader SR(S); in consume() local 135 auto EC = consume(SR, Item); in consume() 136 Data = Data.take_back(SR.bytesRemaining()); in consume()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
D | RDFCopy.cpp | 150 RegisterRef SR = FR->second; in run() local 151 if (DR == SR) in run() 154 NodeId AtCopy = getLocalReachingDef(SR, SA); in run() 167 NodeId AtUse = getLocalReachingDef(SR, IA); in run() 176 << " with " << Print<RegisterRef>(SR, DFG) << " in " in run() 180 unsigned NewReg = MinPhysReg(SR); in run() 205 J.second = SR; in run()
|
/external/clang/tools/libclang/ |
D | CXLoadedDiagnostic.cpp | 210 CXSourceRange &SR); 294 CXSourceRange &SR) { in readRange() argument 307 SR = clang_getRange(startLoc, endLoc); in readRange() 356 CXSourceRange SR; in visitSourceRangeRecord() local 357 if (std::error_code EC = readRange(Start, End, SR)) in visitSourceRangeRecord() 359 CurrentDiags.back()->Ranges.push_back(SR); in visitSourceRangeRecord() 367 CXSourceRange SR; in visitFixitRecord() local 368 if (std::error_code EC = readRange(Start, End, SR)) in visitFixitRecord() 374 std::make_pair(SR, TopDiags->copyString(CodeToInsert))); in visitFixitRecord()
|
/external/swiftshader/third_party/llvm-7.0/llvm/tools/llvm-mca/ |
D | FetchStage.cpp | 25 const SourceRef SR = SM.peekNext(); in execute() local 26 std::unique_ptr<Instruction> I = IB.createInstruction(*SR.second); in execute() 27 IR = InstRef(SR.first, I.get()); in execute()
|