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Searched refs:SRDS_PLLCR0_FRATE_SEL_3_12 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-ls102xa/
Dimmap_ls102xa.h335 #define SRDS_PLLCR0_FRATE_SEL_3_12 0x00090000 macro
/external/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
Dimmap_lsch2.h565 #define SRDS_PLLCR0_FRATE_SEL_3_12 0x00090000 macro