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Searched refs:SRDS_PLLCR0_FRATE_SEL_6_25 (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/powerpc/cpu/mpc85xx/
Dfsl_corenet_serdes.c405 SRDS_PLLCR0_FRATE_SEL_6_25); in p4080_erratum_serdes8()
/external/u-boot/arch/powerpc/include/asm/
Dimmap_85xx.h2636 #define SRDS_PLLCR0_FRATE_SEL_6_25 0x00010000 macro