| /external/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 428 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
432 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
436 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
440 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
445 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
449 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
453 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
457 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMTargetTransformInfo.cpp | 473 { ISD::SREM, MVT::v1i64, 1 * FunctionCallDivCost}, in getArithmeticInstrCost()
477 { ISD::SREM, MVT::v2i32, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
481 { ISD::SREM, MVT::v4i16, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
485 { ISD::SREM, MVT::v8i8, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
490 { ISD::SREM, MVT::v2i64, 2 * FunctionCallDivCost}, in getArithmeticInstrCost()
494 { ISD::SREM, MVT::v4i32, 4 * FunctionCallDivCost}, in getArithmeticInstrCost()
498 { ISD::SREM, MVT::v8i16, 8 * FunctionCallDivCost}, in getArithmeticInstrCost()
502 { ISD::SREM, MVT::v16i8, 16 * FunctionCallDivCost}, in getArithmeticInstrCost()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86TargetTransformInfo.cpp | 247 if ((ISD == ISD::SDIV || ISD == ISD::SREM || ISD == ISD::UDIV || in getArithmeticInstrCost()
252 if (ISD == ISD::SDIV || ISD == ISD::SREM) { in getArithmeticInstrCost()
268 if (ISD == ISD::SREM) { in getArithmeticInstrCost()
295 { ISD::SREM, MVT::v32i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost()
313 { ISD::SREM, MVT::v16i32, 17 }, // vpmuldq+mul+sub sequence in getArithmeticInstrCost()
333 { ISD::SREM, MVT::v16i16, 8 }, // vpmulhw+mul+sub sequence in getArithmeticInstrCost()
337 { ISD::SREM, MVT::v8i32, 19 }, // vpmuldq+mul+sub sequence in getArithmeticInstrCost()
359 { ISD::SREM, MVT::v16i16, 16+2 }, // 2*pmulhw+mul+sub sequence + split. in getArithmeticInstrCost()
361 { ISD::SREM, MVT::v8i16, 8 }, // pmulhw+mul+sub sequence in getArithmeticInstrCost()
367 { ISD::SREM, MVT::v8i32, 48+2 }, // 2*pmuludq+mul+sub sequence + split. in getArithmeticInstrCost()
[all …]
|
| /external/swiftshader/third_party/LLVM/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 189 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
|
| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 195 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
|
| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 201 ADD, SUB, MUL, SDIV, UDIV, SREM, UREM, enumerator
|
| /external/swiftshader/third_party/LLVM/lib/Target/Blackfin/ |
| D | BlackfinISelLowering.cpp | 83 setOperationAction(ISD::SREM, MVT::i16, Expand); in BlackfinTargetLowering()
84 setOperationAction(ISD::SREM, MVT::i32, Expand); in BlackfinTargetLowering()
|
| /external/llvm/test/CodeGen/ARM/ |
| D | divmod-eabi.ll | 3 ; All "eabi" (Bare, GNU and Android) must lower SREM/UREM to __aeabi_{u,i}divmod
|
| /external/swiftshader/third_party/LLVM/lib/Target/Alpha/ |
| D | AlphaISelLowering.cpp | 97 setOperationAction(ISD::SREM , MVT::i64, Custom); in AlphaTargetLowering()
679 case ISD::SREM: in LowerOperation()
700 case ISD::SREM: opstr = "__remq"; break; in LowerOperation()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1675 case ISD::SREM: in selectDivRem()
1696 unsigned MFOpc = (ISDOpcode == ISD::SREM || ISDOpcode == ISD::UREM) in selectDivRem()
1799 if (!selectBinaryOp(I, ISD::SREM)) in fastSelectInstruction()
1800 return selectDivRem(I, ISD::SREM); in fastSelectInstruction()
|
| /external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
| D | LegalizeVectorOps.cpp | 144 case ISD::SREM: in LegalizeOp()
|
| D | SelectionDAGBuilder.h | 485 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } in visitSRem()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 1901 case ISD::SREM: in selectDivRem()
1922 unsigned MFOpc = (ISDOpcode == ISD::SREM || ISDOpcode == ISD::UREM) in selectDivRem()
2023 if (!selectBinaryOp(I, ISD::SREM)) in fastSelectInstruction()
2024 return selectDivRem(I, ISD::SREM); in fastSelectInstruction()
|
| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 102 setOperationAction(ISD::SREM, MVT::i32, Expand); in SystemZTargetLowering()
104 setOperationAction(ISD::SREM, MVT::i64, Expand); in SystemZTargetLowering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUISelLowering.cpp | 180 setOperationAction(ISD::SREM, MVT::i8, Expand); in SPUTargetLowering()
186 setOperationAction(ISD::SREM, MVT::i16, Expand); in SPUTargetLowering()
192 setOperationAction(ISD::SREM, MVT::i32, Expand); in SPUTargetLowering()
198 setOperationAction(ISD::SREM, MVT::i64, Expand); in SPUTargetLowering()
204 setOperationAction(ISD::SREM, MVT::i128, Expand); in SPUTargetLowering()
423 setOperationAction(ISD::SREM, VT, Expand); in SPUTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
| D | divmod-eabi.ll | 12 ; All "eabi" (Bare, GNU and Android) must lower SREM/UREM to __aeabi_{u,i}divmod
|
| /external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 158 setOperationAction(ISD::SREM, MVT::i8, Expand); in MSP430TargetLowering()
164 setOperationAction(ISD::SREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 182 case ISD::SREM: return "srem"; in getOperationName()
|
| D | SelectionDAGBuilder.h | 836 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } in visitSRem()
|
| /external/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 151 setOperationAction(ISD::SREM, MVT::i8, Expand); in MSP430TargetLowering()
157 setOperationAction(ISD::SREM, MVT::i16, Expand); in MSP430TargetLowering()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFISelLowering.cpp | 82 setOperationAction(ISD::SREM, MVT::i64, Expand); in BPFTargetLowering()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 215 case ISD::SREM: return "srem"; in getOperationName()
|
| D | SelectionDAGBuilder.h | 866 void visitSRem(const User &I) { visitBinary(I, ISD::SREM); } in visitSRem()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 711 case ISD::SREM: in canOpTrap()
1456 case SRem: return ISD::SREM; in InstructionOpcodeToISD()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
| D | MSP430ISelLowering.cpp | 132 setOperationAction(ISD::SREM, MVT::i8, Promote); in MSP430TargetLowering()
138 setOperationAction(ISD::SREM, MVT::i16, LibCall); in MSP430TargetLowering()
|