Searched refs:SRegs (Results 1 – 5 of 5) sorted by relevance
| /external/swiftshader/third_party/llvm-7.0/llvm/test/TableGen/ |
| D | ConcatenatedSubregs.td | 48 def SRegs : MyClass<16, [i16], (sequence "S%u", 0, 15)>;
67 [(decimate (shl SRegs, 1), 2),
68 (decimate (shl SRegs, 2), 2)]>;
72 (shl SRegs, 0),
73 (shl SRegs, 1),
74 (shl SRegs, 2),
75 (shl SRegs, 3),
76 (shl SRegs, 4)
82 // CHECK-LABEL: RegisterClass SRegs:
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 1245 BitVector SRegs(Hexagon::NUM_TARGET_REGS); in assignCalleeSavedSpillSlots() local
1258 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()
1261 DEBUG(dbgs() << "SRegs.1: "; dump_registers(SRegs, *TRI); dbgs() << "\n"); in assignCalleeSavedSpillSlots()
1269 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()
1272 DEBUG(dbgs() << "SRegs.2: "; dump_registers(SRegs, *TRI); dbgs() << "\n"); in assignCalleeSavedSpillSlots()
1279 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1296 SRegs |= TmpSup; in assignCalleeSavedSpillSlots()
1297 DEBUG(dbgs() << "SRegs.4: "; dump_registers(SRegs, *TRI); dbgs() << "\n"); in assignCalleeSavedSpillSlots()
1301 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1304 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Hexagon/ |
| D | HexagonFrameLowering.cpp | 1401 BitVector SRegs(Hexagon::NUM_TARGET_REGS); in assignCalleeSavedSpillSlots() local
1414 SRegs[*SR] = true; in assignCalleeSavedSpillSlots()
1417 LLVM_DEBUG(dbgs() << "SRegs.1: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()
1426 SRegs[*SR] = false; in assignCalleeSavedSpillSlots()
1430 LLVM_DEBUG(dbgs() << "SRegs.2: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()
1438 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1456 SRegs |= TmpSup; in assignCalleeSavedSpillSlots()
1457 LLVM_DEBUG(dbgs() << "SRegs.4: "; dump_registers(SRegs, *TRI); in assignCalleeSavedSpillSlots()
1462 for (int x = SRegs.find_first(); x >= 0; x = SRegs.find_next(x)) { in assignCalleeSavedSpillSlots()
1465 if (!SRegs[*SR]) in assignCalleeSavedSpillSlots()
[all …]
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 2173 SmallVector<unsigned, 8> SRegs; in readlaneVGPRToSGPR() local
2179 SRegs.push_back(SGPR); in readlaneVGPRToSGPR()
2186 MIB.addReg(SRegs[i]); in readlaneVGPRToSGPR()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 3413 SmallVector<unsigned, 8> SRegs; in readlaneVGPRToSGPR() local
3419 SRegs.push_back(SGPR); in readlaneVGPRToSGPR()
3426 MIB.addReg(SRegs[i]); in readlaneVGPRToSGPR()
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