| /external/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 66 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
71 return SRem; in generateSignedRemainderCode()
377 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
389 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
487 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
512 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
536 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
560 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
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| D | BypassSlowDivision.cpp | 223 bool UseRemOp = Opcode == Instruction::SRem || Opcode == Instruction::URem; in bypassSlowDivision()
225 Opcode == Instruction::SRem; in bypassSlowDivision()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 66 Value *SRem = Builder.CreateSub(Xored, DividendSign); in generateSignedRemainderCode() local
71 return SRem; in generateSignedRemainderCode()
377 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainder()
389 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainder()
487 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo32Bits()
512 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo32Bits()
536 assert((Rem->getOpcode() == Instruction::SRem || in expandRemainderUpTo64Bits()
560 if (Rem->getOpcode() == Instruction::SRem) { in expandRemainderUpTo64Bits()
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| D | BypassSlowDivision.cpp | 95 SlowDivOrRem->getOpcode() == Instruction::SRem; in isSignedOp()
119 case Instruction::SRem: in FastDivInsertionTask()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/unittests/Transforms/Utils/ |
| D | IntegerDivision.cpp | 83 TEST(IntegerDivision, SRem) { in TEST() argument
102 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem); in TEST()
223 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem); in TEST()
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| /external/llvm/unittests/Transforms/Utils/ |
| D | IntegerDivision.cpp | 83 TEST(IntegerDivision, SRem) { in TEST() argument
102 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem); in TEST()
223 EXPECT_TRUE(BB->front().getOpcode() == Instruction::SRem); in TEST()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUCodeGenPrepare.cpp | 205 I.getOpcode() == Instruction::SDiv || I.getOpcode() == Instruction::SRem; in isSigned()
274 I.getOpcode() == Instruction::SRem || in promoteUniformOpToI32()
615 Opc == Instruction::SRem || Opc == Instruction::SDiv); in expandDivRem32()
625 bool IsSigned = Opc == Instruction::SRem || Opc == Instruction::SDiv; in expandDivRem32()
766 Opc == Instruction::SRem || Opc == Instruction::SDiv) && in visitBinaryOperator()
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| /external/swiftshader/third_party/LLVM/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 1370 case Instruction::SRem: in visitICmpInstWithInstAndIntCst()
2339 BinaryOperator *SRem = NULL; in visitICmpInst() local
2341 if (BO0 && BO0->getOpcode() == Instruction::SRem && in visitICmpInst()
2343 SRem = BO0; in visitICmpInst()
2345 else if (BO1 && BO1->getOpcode() == Instruction::SRem && in visitICmpInst()
2347 SRem = BO1; in visitICmpInst()
2348 if (SRem) { in visitICmpInst()
2351 switch (SRem == BO0 ? ICmpInst::getSwappedPredicate(Pred) : Pred) { in visitICmpInst()
2359 return new ICmpInst(ICmpInst::ICMP_SGT, SRem->getOperand(1), in visitICmpInst()
2360 Constant::getAllOnesValue(SRem->getType())); in visitICmpInst()
[all …]
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| /external/swiftshader/third_party/LLVM/lib/Transforms/Utils/ |
| D | SimplifyIndVar.cpp | 253 bool IsSigned = Rem->getOpcode() == Instruction::SRem; in eliminateIVUser()
422 bool IsSigned = Rem->getOpcode() == Instruction::SRem; in simplifyIVUsers()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/Scalar/ |
| D | DivRemPairs.cpp | 63 else if (I.getOpcode() == Instruction::SRem) in optimizeDivRem()
|
| /external/swiftshader/third_party/LLVM/lib/VMCore/ |
| D | Instruction.cpp | 119 case SRem: return "srem"; in getOpcodeName()
410 case SRem: { in isSafeToSpeculativelyExecute()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/FuzzMutate/ |
| D | Operations.cpp | 25 Ops.push_back(binOpDescriptor(1, Instruction::SRem)); in describeFuzzerIntOps()
103 case Instruction::SRem: in binOpDescriptor()
|
| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 166 case Instruction::SRem: in getIntImmCost()
|
| /external/swiftshader/third_party/subzero/pnacl-llvm/ |
| D | NaClBitcodeDecoders.cpp | 95 LLVMOpcode = Ty->isFPOrFPVectorTy() ? Instruction::FRem : Instruction::SRem; in DecodeBinaryOpcode()
|
| /external/swiftshader/third_party/SPIRV-Tools/source/ |
| D | assembly_grammar.cpp | 115 CASE(SRem),
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| /external/deqp-deps/SPIRV-Tools/source/ |
| D | assembly_grammar.cpp | 115 CASE(SRem),
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/XCore/ |
| D | XCoreLowerThreadLocal.cpp | 96 case Instruction::SRem: in createReplacementInstr()
|
| /external/llvm/lib/Target/XCore/ |
| D | XCoreLowerThreadLocal.cpp | 96 case Instruction::SRem: in createReplacementInstr()
|
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 2207 case Instruction::SRem: in visitICmpInstWithInstAndIntCst()
3972 BinaryOperator *SRem = nullptr; in visitICmpInst() local
3974 if (BO0 && BO0->getOpcode() == Instruction::SRem && in visitICmpInst()
3976 SRem = BO0; in visitICmpInst()
3978 else if (BO1 && BO1->getOpcode() == Instruction::SRem && in visitICmpInst()
3980 SRem = BO1; in visitICmpInst()
3981 if (SRem) { in visitICmpInst()
3984 switch (SRem == BO0 ? ICmpInst::getSwappedPredicate(Pred) : Pred) { in visitICmpInst()
3992 return new ICmpInst(ICmpInst::ICMP_SGT, SRem->getOperand(1), in visitICmpInst()
3993 Constant::getAllOnesValue(SRem->getType())); in visitICmpInst()
[all …]
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| D | InstCombineVectorOps.cpp | 660 case Instruction::SRem: in CanEvaluateShuffled()
723 case Instruction::SRem: in buildNew()
823 case Instruction::SRem: in EvaluateInDifferentElementOrder()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
| D | SystemZTargetTransformInfo.cpp | 166 case Instruction::SRem: in getIntImmCost()
452 if ((Opcode == Instruction::SDiv || Opcode == Instruction::SRem)) in getArithmeticInstrCost()
|
| /external/spirv-llvm/lib/SPIRV/libSPIRV/ |
| D | SPIRVOpCodeEnum.h | 128 _SPIRV_OP(SRem, 138)
|
| /external/swiftshader/third_party/LLVM/lib/Target/CBackend/ |
| D | CBackend.cpp | 810 case Instruction::SRem: in printConstant()
831 case Instruction::SRem: in printConstant()
1140 case Instruction::SRem: in printConstExprCast()
1206 case Instruction::SRem: in printConstantWithCast()
1350 case Instruction::SRem: in writeInstructionCast()
1396 case Instruction::SRem: // Cast to signed first in writeOperandWithCast()
2563 case Instruction::SRem: in visitBinaryOperator()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCompares.cpp | 2600 case Instruction::SRem: in foldICmpBinOpEqualityWithConstant()
3246 BinaryOperator *SRem = nullptr; in foldICmpBinOp() local
3248 if (BO0 && BO0->getOpcode() == Instruction::SRem && Op1 == BO0->getOperand(1)) in foldICmpBinOp()
3249 SRem = BO0; in foldICmpBinOp()
3251 else if (BO1 && BO1->getOpcode() == Instruction::SRem && in foldICmpBinOp()
3253 SRem = BO1; in foldICmpBinOp()
3254 if (SRem) { in foldICmpBinOp()
3257 switch (SRem == BO0 ? ICmpInst::getSwappedPredicate(Pred) : Pred) { in foldICmpBinOp()
3266 return new ICmpInst(ICmpInst::ICMP_SGT, SRem->getOperand(1), in foldICmpBinOp()
3267 Constant::getAllOnesValue(SRem->getType())); in foldICmpBinOp()
[all …]
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| /external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/IR/ |
| D | Instruction.h | 147 return Opcode == UDiv || Opcode == SDiv || Opcode == URem || Opcode == SRem;
|