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Searched refs:SSCG_PLL_DIV10_CLKE_MASK (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/mach-imx/mx8m/
Dclock.c184 pll_clke = SSCG_PLL_DIV10_CLKE_MASK; in decode_sscg_pll()
625 SSCG_PLL_DIV8_CLKE_MASK | SSCG_PLL_DIV10_CLKE_MASK | in sscg_pll_init()
640 SSCG_PLL_DIV8_CLKE_MASK | SSCG_PLL_DIV10_CLKE_MASK | in sscg_pll_init()
711 SSCG_PLL_DIV10_CLKE_MASK | SSCG_PLL_DIV20_CLKE_MASK); in clock_init()
717 SSCG_PLL_DIV10_CLKE_MASK | SSCG_PLL_DIV20_CLKE_MASK); in clock_init()
/external/u-boot/arch/arm/include/asm/arch-mx8m/
Dclock.h540 #define SSCG_PLL_DIV10_CLKE_MASK BIT(11) macro