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Searched refs:SSCR1_SPO (Results 1 – 2 of 2) sorted by relevance

/external/u-boot/arch/arm/include/asm/arch-armada100/
Dspi.h46 #define SSCR1_SPO (1 << 3) /* Motorola SPI SSPSCLK polarity macro
/external/u-boot/include/
DSA-1100.h1068 #define SSCR1_SPO 0x00000008 /* Sample clock (SCLK) POlarity */ macro
1069 #define SSCR1_SClkIactL (SSCR1_SPO*0) /* Sample Clock Inactive Low */
1070 #define SSCR1_SClkIactH (SSCR1_SPO*1) /* Sample Clock Inactive High */