/external/libhevc/common/arm64/ |
D | ihevc_inter_pred_chroma_copy.s | 124 ST1 {v0.s}[0],[x1] //vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0) 127 ST1 {v0.s}[0],[x6],x3 //vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0) 130 ST1 {v0.s}[0],[x6],x3 //vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0) 133 ST1 {v0.s}[0],[x6],x3 //vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0) 155 ST1 {v0.s}[0],[x1] //vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0) 158 ST1 {v0.s}[0],[x6],x3 //vst1_lane_u32((uint32_t *)pu1_dst_tmp, src_tmp, 0) 178 ST1 {v0.8b},[x1],#8 //vst1_u8(pu1_dst_tmp, tmp_src) 180 ST1 {v1.8b},[x6],x3 //vst1_u8(pu1_dst_tmp, tmp_src) 183 ST1 {v2.8b},[x6],x3 //vst1_u8(pu1_dst_tmp, tmp_src) 185 ST1 {v3.8b},[x6],x3 //vst1_u8(pu1_dst_tmp, tmp_src) [all …]
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D | ihevc_mem_fns.s | 84 ST1 {v0.8b},[x0],#8 113 ST1 {v0.8b},[x0],#8 156 ST1 {v0.8b},[x0],#8 185 ST1 {v0.8b},[x0],#8 229 ST1 {v0.8h},[x0],#16 258 ST1 {v0.8h},[x0],#16
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D | ihevc_sao_band_offset_luma.s | 120 ST1 {v0.8b},[x3],#8 //Store to pu1_src_top[col] 225 ST1 {v13.8b},[x4],x1 //vst1_u8(pu1_src_cpy, au1_cur_row) 227 ST1 {v15.8b},[x5] //vst1_u8(pu1_src_cpy, au1_cur_row) 230 ST1 {v17.8b},[x6],x1 //vst1_u8(pu1_src_cpy, au1_cur_row) 233 ST1 {v19.8b},[x10] //vst1_u8(pu1_src_cpy, au1_cur_row)
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D | ihevc_sao_edge_offset_class1.s | 137 ST1 { v30.16b},[x3],#16 //vst1q_u8(pu1_src_top[col]) 209 ST1 { v20.16b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 215 ST1 { v30.16b},[x10],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 248 ST1 { v30.16b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 271 ST1 {v30.8b},[x3] //vst1_u8(pu1_src_top[col]) 322 ST1 {v20.8b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 326 ST1 {v30.8b},[x10],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 352 ST1 {v30.8b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row)
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D | ihevc_sao_edge_offset_class1_chroma.s | 161 ST1 { v30.16b},[x3],#16 //vst1q_u8(pu1_src_top[col]) 257 ST1 { v20.16b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 263 ST1 { v30.16b},[x10],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 308 ST1 { v30.16b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 333 ST1 {v30.8b},[x3] //vst1_u8(pu1_src_top[col]) 409 ST1 {v20.8b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 413 ST1 {v30.8b},[x10],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 451 ST1 {v30.8b},[x10],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row)
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D | ihevc_sao_edge_offset_class0_chroma.s | 128 ST1 {v0.8b},[x3],#8 //Store to pu1_src_top[col] 298 ST1 {v21.8b},[x12],#8 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 299 ST1 {v23.8b},[x12],x1 309 ST1 {v28.8b, v29.8b},[x12],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 458 ST1 {v18.8b},[x12],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 469 ST1 {v28.8b},[x12],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row)
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D | ihevc_sao_edge_offset_class0.s | 112 ST1 {v0.8b},[x3],#8 //Store to pu1_src_top[col] 247 ST1 {v18.8b, v19.8b},[x12],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 252 ST1 {v0.8b, v1.8b},[x12],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 332 ST1 {v28.8b},[x12],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row)
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D | ihevc_sao_band_offset_chroma.s | 137 ST1 {v0.8b},[x3],#8 //Store to pu1_src_top[col] 393 ST1 {v5.8b},[x4] //vst1q_u8(pu1_src_cpy, au1_cur_row) 401 ST1 {v13.8b},[x5] //vst1q_u8(pu1_src_cpy, au1_cur_row) 410 ST1 {v17.8b},[x6],x1 //vst1q_u8(pu1_src_cpy, au1_cur_row) 416 ST1 {v21.8b},[x7] //vst1q_u8(pu1_src_cpy, au1_cur_row)
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D | ihevc_sao_edge_offset_class2.s | 110 …ST1 {v0.8b},[x12],#8 //au1_src_top_tmp[col] = pu1_src[(ht - 1) * src_strd + col] 357 ST1 { v20.16b},[x0],x1 //I vst1q_u8(pu1_src_cpy, pu1_cur_row) 466 ST1 { v26.16b},[x0],x1 //II vst1q_u8(pu1_src_cpy, pu1_cur_row) 472 ST1 { v20.16b},[x0],x1 //III vst1q_u8(pu1_src_cpy, pu1_cur_row) 532 ST1 { v20.16b},[x0],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 667 ST1 { v28.16b},[x0],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 793 ST1 {v30.8b},[x0],x1 //vst1q_u8(pu1_src_cpy, pu1_cur_row) 839 ST1 {v0.8b},[x3],#8 //pu1_src_top[col] = au1_src_top_tmp[col]
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/external/libxaac/decoder/armv8/ |
D | ixheaacd_no_lap1.s | 76 ST1 {V27.H}[2], [X1], X7 79 ST1 {V27.H}[3], [X1], X7 81 ST1 {V27.H}[0], [X1], X7 83 ST1 {V27.H}[1], [X1], X7 91 ST1 {V27.H}[2], [X1], X7 94 ST1 {V27.H}[3], [X1], X7 96 ST1 {V27.H}[0], [X1], X7 98 ST1 {V27.H}[1], [X1], X7 106 ST1 {V27.H}[2], [X1], X7 108 ST1 {V27.H}[3], [X1], X7 [all …]
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D | ixheaacd_overlap_add2.s | 105 ST1 {V24.S}[0], [X2], X11 107 ST1 {V24.S}[1], [X2], X11 109 ST1 {V24.S}[2], [X2], X11 112 ST1 {V24.S}[3], [X2], X11 127 ST1 {V16.S}[0], [X2], X11 134 ST1 {V16.S}[1], [X2], X11 135 ST1 {V16.S}[2], [X2], X11 136 ST1 {V16.S}[3], [X2], X11 142 ST1 {V24.S}[0], [X2], X11 145 ST1 {V24.S}[1], [X2], X11 [all …]
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D | ixheaacd_overlap_add1.s | 152 ST1 {V26.H}[0], [X11], X4 154 ST1 {V26.H}[1], [X11], X4 156 ST1 {V26.H}[2], [X11], X4 158 ST1 {V26.H}[3], [X11], X4 160 ST1 {V18.H}[0], [X6], X9 162 ST1 {V18.H}[1], [X6], X9 164 ST1 {V18.H}[2], [X6], X9 166 ST1 {V18.H}[3], [X6], X9 210 ST1 {V26.H}[0], [X11], X4 214 ST1 {V26.H}[1], [X11], X4 [all …]
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D | ixheaacd_cos_sin_mod_loop2.s | 90 ST1 {v4.s}[0], [x11] 120 ST1 {v12.s}[0], [x3], x8 122 ST1 {v14.s}[0], [x0], #4 127 ST1 {v12.s}[2], [x10], #4 129 ST1 {v16.s}[2], [x11], x8 160 ST1 {v12.s}[0], [x0], #4 161 ST1 {v14.s}[0], [x3], x8 164 ST1 {v12.s}[2], [x11], x8 165 ST1 {v16.s}[2], [x10], #4 199 ST1 {v12.s}[0], [x3], x8 [all …]
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D | ixheaacd_inv_dit_fft_8pt.s | 149 ST1 {v3.s}[0], [x1], #4 150 ST1 {v4.s}[0], [x1], #4 151 ST1 {v5.s}[0], [x1], #4 152 ST1 {v6.s}[0], [x1], #4 153 ST1 {v12.s}[0], [x1], #4 154 ST1 {v13.s}[0], [x1], #4 156 ST1 {v3.s}[1], [x2], #4 157 ST1 {v4.s}[1], [x2], #4 158 ST1 {v5.s}[1], [x2], #4 159 ST1 {v6.s}[1], [x2], #4 [all …]
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D | ixheaacd_sbr_qmfsyn64_winadd.s | 206 ST1 {v28.h}[0], [x3], x5 213 ST1 {v28.h}[1], [x3], x5 221 ST1 {v28.h}[2], [x3], x5 224 ST1 {v28.h}[3], [x3], x5 295 ST1 {v28.h}[0], [x3], x5 304 ST1 {v28.h}[1], [x3], x5 307 ST1 {v28.h}[2], [x3], x5 310 ST1 {v28.h}[3], [x3], x5 366 ST1 {v28.h}[0], [x3], x5 370 ST1 {v28.h}[1], [x3], x5 [all …]
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D | ixheaacd_post_twiddle_overlap.s | 292 ST1 {v8.h}[2], [x0], x9 293 ST1 {v8.h}[0], [x5], x10 558 ST1 { v26.4s}, [x4], #16 559 ST1 { v0.4s}, [x4], #16 762 ST1 {v14.h}[0], [x0] 766 ST1 {v22.h}[0], [x0] 770 ST1 {v14.h}[1], [x0] 774 ST1 {v22.h}[1], [x0] 778 ST1 {v14.h}[2], [x0] 782 ST1 {v22.h}[2], [x0] [all …]
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D | ixheaacd_shiftrountine_with_round.s | 62 ST1 {v2.h}[1], [x2], #2 63 ST1 {v2.h}[3], [X17] 65 ST1 {v2.h}[7], [x17] //STRH w7, [x12, x14] 66 ST1 {v2.h}[5], [x12], #2 //STRH w6, [x12], #2
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D | ixheaacd_shiftrountine_with_round_eld.s | 68 ST1 {v2.h}[1], [x2], #2 69 ST1 {v2.h}[3], [X17] 71 ST1 {v2.h}[7], [x17] //STRH w7, [x12, x14] 72 ST1 {v2.h}[5], [x12], #2 //STRH w6, [x12], #2
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D | ixheaacd_sbr_qmf_analysis32_neon.s | 243 ST1 { v30.4s}, [x4], #16 259 ST1 { v30.4s}, [x11], #16 326 ST1 { v30.4s}, [x4], #16 334 ST1 { v30.4s}, [x11], #16
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/external/libhevc/decoder/arm64/ |
D | ihevcd_fmt_conv_420sp_to_420sp.s | 118 ST1 {v0.8b},[x2],#8 119 ST1 {v1.8b},[x2],#8 120 ST1 {v2.8b},[x2],#8 121 ST1 {v3.8b},[x2],#8 138 ST1 {v0.8b},[x2],#8 139 ST1 {v1.8b},[x2],#8 140 ST1 {v2.8b},[x2],#8 141 ST1 {v3.8b},[x2],#8 174 ST1 {v0.8b},[x2],#8 175 ST1 {v1.8b},[x2],#8 [all …]
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D | ihevcd_fmt_conv_420sp_to_rgba8888.s | 275 ST1 {v14.4s},[x2],#16 276 ST1 {v20.4s},[x2],#16 277 ST1 {v16.4s},[x2],#16 278 ST1 {v22.4s},[x2],#16 341 ST1 {v14.4s},[x8],#16 342 ST1 {v20.4s},[x8],#16 343 ST1 {v16.4s},[x8],#16 344 ST1 {v22.4s},[x8],#16 438 ST1 {v14.4s},[x2],#16 439 ST1 {v20.4s},[x2],#16 [all …]
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D | ihevcd_fmt_conv_420sp_to_420p.s | 174 ST1 {v0.8b},[x3],#8 175 ST1 {v1.8b},[x5],#8 190 ST1 {v0.8b},[x3],#8 191 ST1 {v1.8b},[x5],#8
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/Mips/ |
D | helloworld.ll | 4 …-gnu -march=mipsel -mattr=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST1 43 ; ST1: li ${{[0-9]+}}, %hi($.str) 44 ; ST1: sll ${{[0-9]+}}, ${{[0-9]+}}, 16 45 ; ST1: addiu ${{[0-9]+}}, %lo($.str)
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/external/llvm/test/CodeGen/Mips/ |
D | helloworld.ll | 4 …-gnu -march=mipsel -mattr=mips16 -relocation-model=static -O3 < %s | FileCheck %s -check-prefix=ST1 43 ; ST1: li ${{[0-9]+}}, %hi($.str) 44 ; ST1: sll ${{[0-9]+}}, ${{[0-9]+}}, 16 45 ; ST1: addiu ${{[0-9]+}}, %lo($.str)
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/external/llvm/test/CodeGen/X86/ |
D | merge-store-partially-alias-loads.ll | 27 ; DBGDAG-DAG: [[ST1:t[0-9]+]]: ch = store<ST1[%tmp14]> [[ST2]], [[LD1]], t{{[0-9]+}}, undef:i64 28 ; DBGDAG: X86ISD::RET_FLAG [[ST1]],
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