| /external/libvpx/libvpx/third_party/libyuv/include/libyuv/ |
| D | macros_msa.h | 146 #define ST_H(RTYPE, in, pdst) *((RTYPE*)(pdst)) = (in) /* NOLINT */ macro
147 #define ST_UH(...) ST_H(v8u16, __VA_ARGS__)
197 ST_H(RTYPE, in0, (pdst)); \
198 ST_H(RTYPE, in1, (pdst) + stride); \
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| /external/libyuv/files/include/libyuv/ |
| D | macros_msa.h | 146 #define ST_H(RTYPE, in, pdst) *((RTYPE*)(pdst)) = (in) /* NOLINT */ macro
147 #define ST_UH(...) ST_H(v8u16, __VA_ARGS__)
197 ST_H(RTYPE, in0, (pdst)); \
198 ST_H(RTYPE, in1, (pdst) + stride); \
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 72 case Mips::ST_H: in getLoadStoreOffsetSizeInBits()
89 case Mips::ST_H: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 213 Opc = Mips::ST_H; in storeRegToStack()
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| D | MipsMSAInstrInfo.td | 3464 def ST_H: ST_H_ENC, ST_H_DESC;
3531 (ST_H MSA128H:$ws, addrimm10:$addr)>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 73 case Mips::ST_H: in getLoadStoreOffsetSizeInBits()
133 case Mips::ST_H: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 282 Opc = Mips::ST_H; in storeRegToStack()
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| D | MipsMSAInstrInfo.td | 3485 def ST_H: ST_H_ENC, ST_H_DESC;
3552 (ST_H MSA128H:$ws, addrimm10lsl1:$addr)>;
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| /external/webp/src/dsp/ |
| D | msa_macro.h | 64 #define ST_H(RTYPE, in, pdst) *((RTYPE*)(pdst)) = in macro
65 #define ST_UH(...) ST_H(v8u16, __VA_ARGS__)
66 #define ST_SH(...) ST_H(v8i16, __VA_ARGS__)
351 ST_H(RTYPE, in0, pdst); \
352 ST_H(RTYPE, in1, pdst + stride); \
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| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| D | vp8_macros_msa.h | 35 #define ST_H(RTYPE, in, pdst) *((RTYPE *)(pdst)) = (in) macro
36 #define ST_UH(...) ST_H(v8u16, __VA_ARGS__)
37 #define ST_SH(...) ST_H(v8i16, __VA_ARGS__)
374 ST_H(RTYPE, in0, (pdst)); \
375 ST_H(RTYPE, in1, (pdst) + stride); \
|
| /external/libaom/libaom/aom_dsp/mips/ |
| D | macros_msa.h | 36 #define ST_H(RTYPE, in, pdst) *((RTYPE *)(pdst)) = (in) macro
37 #define ST_SH(...) ST_H(v8i16, __VA_ARGS__)
437 ST_H(RTYPE, in0, (pdst)); \
438 ST_H(RTYPE, in1, (pdst) + stride); \
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| /external/v8/src/mips/ |
| D | constants-mips.h | 752 ST_H = ((9U << 2) + 1), enumerator
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| D | assembler-mips.cc | 3263 V(st_h, ST_H) \
|
| /external/v8/src/mips64/ |
| D | constants-mips64.h | 786 ST_H = ((9U << 2) + 1), enumerator
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| D | assembler-mips64.cc | 3580 V(st_h, ST_H) \
|
| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1491 case Mips::ST_H: in DecodeMSA128Mem()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1721 case Mips::ST_H: in DecodeMSA128Mem()
|
| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 1547 12603758U, // ST_H
3261 0U, // ST_H
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| D | MipsGenDisassemblerTables.inc | 3005 /* 10591 */ MCD_OPC_Decode, 250, 11, 167, 1, // Opcode: ST_H
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 2424 UINT64_C(2013265957), // ST_H
2832 case Mips::ST_H: {
10150 Feature_HasStdEnc | Feature_HasMSA | 0, // ST_H = 2411
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| D | MipsGenAsmWriter.inc | 3639 25187250U, // ST_H
6270 0U, // ST_H
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| D | MipsGenDAGISel.inc | 477 /* 765*/ OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_H), 0|OPFL_Chain|OPFL_MemRefs,
480 // Dst: (ST_H MSA128HOpnd:{ *:[v8i16] }:$wd, addrimm10lsl1:{ *:[iPTR] }:$addr)
513 /* 831*/ OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_H), 0|OPFL_Chain|OPFL_MemRefs,
516 // Dst: (ST_H MSA128H:{ *:[v8f16] }:$ws, addrimm10lsl1:{ *:[iPTR] }:$addr)
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| D | MipsGenInstrInfo.inc | 2426 ST_H = 2411,
6471 …LL<<MCID::MayStore), 0x6ULL, nullptr, nullptr, OperandInfo269, -1 ,nullptr }, // Inst #2411 = ST_H
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| D | MipsGenDisassemblerTables.inc | 5464 /* 13461 */ MCD::OPC_Decode, 235, 18, 175, 2, // Opcode: ST_H
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| D | MipsGenAsmMatcher.inc | 7408 …{ 8764 /* st.h */, Mips::ST_H, Convert__MSA128AsmReg1_0__MemOffsetSimm10_12_1, Feature_HasStdEnc|F…
|