| /external/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 75 case Mips::ST_W: in getLoadStoreOffsetSizeInBits()
92 case Mips::ST_W: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 215 Opc = Mips::ST_W; in storeRegToStack()
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| D | MipsMSAInstrInfo.td | 3465 def ST_W: ST_W_ENC, ST_W_DESC;
3533 (ST_W MSA128W:$ws, addrimm10:$addr)>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 76 case Mips::ST_W: in getLoadStoreOffsetSizeInBits()
136 case Mips::ST_W: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 285 Opc = Mips::ST_W; in storeRegToStack()
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| D | MipsMSAInstrInfo.td | 3486 def ST_W: ST_W_ENC, ST_W_DESC;
3554 (ST_W MSA128W:$ws, addrimm10lsl2:$addr)>;
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| /external/webp/src/dsp/ |
| D | msa_macro.h | 68 #define ST_W(RTYPE, in, pdst) *((RTYPE*)(pdst)) = in macro
69 #define ST_UW(...) ST_W(v4u32, __VA_ARGS__)
70 #define ST_SW(...) ST_W(v4i32, __VA_ARGS__)
325 ST_W(RTYPE, in0, pdst); \
326 ST_W(RTYPE, in1, pdst + stride); \
333 ST_W(RTYPE, in2, pdst + 2 * stride); \
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| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| D | vp8_macros_msa.h | 39 #define ST_W(RTYPE, in, pdst) *((RTYPE *)(pdst)) = (in) macro
40 #define ST_SW(...) ST_W(v4i32, __VA_ARGS__)
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| /external/v8/src/mips/ |
| D | constants-mips.h | 753 ST_W = ((9U << 2) + 2), enumerator
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| D | assembler-mips.cc | 3264 V(st_w, ST_W) \
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| /external/libaom/libaom/aom_dsp/mips/ |
| D | macros_msa.h | 39 #define ST_W(RTYPE, in, pdst) *((RTYPE *)(pdst)) = (in) macro
40 #define ST_SW(...) ST_W(v4i32, __VA_ARGS__)
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 787 ST_W = ((9U << 2) + 2), enumerator
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| D | assembler-mips64.cc | 3581 V(st_w, ST_W) \
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1495 case Mips::ST_W: in DecodeMSA128Mem()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1725 case Mips::ST_W: in DecodeMSA128Mem()
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 1548 12607748U, // ST_W
3262 0U, // ST_W
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| D | MipsGenDisassemblerTables.inc | 3008 /* 10604 */ MCD_OPC_Decode, 251, 11, 167, 1, // Opcode: ST_W
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 2425 UINT64_C(2013265958), // ST_W
2843 case Mips::ST_W: {
10151 Feature_HasStdEnc | Feature_HasMSA | 0, // ST_W = 2412
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| D | MipsGenAsmWriter.inc | 3640 25191539U, // ST_W
6271 0U, // ST_W
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| D | MipsGenDAGISel.inc | 489 /* 787*/ OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_W), 0|OPFL_Chain|OPFL_MemRefs,
492 // Dst: (ST_W MSA128WOpnd:{ *:[v4i32] }:$wd, addrimm10lsl2:{ *:[iPTR] }:$addr)
525 /* 853*/ OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_W), 0|OPFL_Chain|OPFL_MemRefs,
528 // Dst: (ST_W MSA128W:{ *:[v4f32] }:$ws, addrimm10lsl2:{ *:[iPTR] }:$addr)
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| D | MipsGenInstrInfo.inc | 2427 ST_W = 2412,
6472 …LL<<MCID::MayStore), 0x6ULL, nullptr, nullptr, OperandInfo270, -1 ,nullptr }, // Inst #2412 = ST_W
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| D | MipsGenDisassemblerTables.inc | 5467 /* 13476 */ MCD::OPC_Decode, 236, 18, 175, 2, // Opcode: ST_W
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| D | MipsGenAsmMatcher.inc | 7409 …{ 8769 /* st.w */, Mips::ST_W, Convert__MSA128AsmReg1_0__MemOffsetSimm10_22_1, Feature_HasStdEnc|F…
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